mirror of https://github.com/F-Stack/f-stack.git
84 lines
3.2 KiB
C
84 lines
3.2 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2021 Intel Corporation
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*/
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#ifndef VRB1_VF_ENUM_H
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#define VRB1_VF_ENUM_H
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/*
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* VRB1 Register mapping on VF BAR0
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* This is automatically generated from RDL, format may change with new RDL
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*/
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enum {
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VRB1_VfQmgrIngressAq = 0x00000000,
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VRB1_VfHiVfToPfDbellVf = 0x00000800,
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VRB1_VfHiPfToVfDbellVf = 0x00000808,
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VRB1_VfHiInfoRingBaseLoVf = 0x00000810,
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VRB1_VfHiInfoRingBaseHiVf = 0x00000814,
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VRB1_VfHiInfoRingPointerVf = 0x00000818,
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VRB1_VfHiInfoRingIntWrEnVf = 0x00000820,
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VRB1_VfHiInfoRingPf2VfWrEnVf = 0x00000824,
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VRB1_VfHiMsixVectorMapperVf = 0x00000860,
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VRB1_VfDmaFec5GulDescBaseLoRegVf = 0x00000920,
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VRB1_VfDmaFec5GulDescBaseHiRegVf = 0x00000924,
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VRB1_VfDmaFec5GulRespPtrLoRegVf = 0x00000928,
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VRB1_VfDmaFec5GulRespPtrHiRegVf = 0x0000092C,
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VRB1_VfDmaFec5GdlDescBaseLoRegVf = 0x00000940,
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VRB1_VfDmaFec5GdlDescBaseHiRegVf = 0x00000944,
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VRB1_VfDmaFec5GdlRespPtrLoRegVf = 0x00000948,
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VRB1_VfDmaFec5GdlRespPtrHiRegVf = 0x0000094C,
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VRB1_VfDmaFec4GulDescBaseLoRegVf = 0x00000960,
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VRB1_VfDmaFec4GulDescBaseHiRegVf = 0x00000964,
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VRB1_VfDmaFec4GulRespPtrLoRegVf = 0x00000968,
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VRB1_VfDmaFec4GulRespPtrHiRegVf = 0x0000096C,
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VRB1_VfDmaFec4GdlDescBaseLoRegVf = 0x00000980,
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VRB1_VfDmaFec4GdlDescBaseHiRegVf = 0x00000984,
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VRB1_VfDmaFec4GdlRespPtrLoRegVf = 0x00000988,
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VRB1_VfDmaFec4GdlRespPtrHiRegVf = 0x0000098C,
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VRB1_VfDmaFftDescBaseLoRegVf = 0x000009A0,
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VRB1_VfDmaFftDescBaseHiRegVf = 0x000009A4,
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VRB1_VfDmaFftRespPtrLoRegVf = 0x000009A8,
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VRB1_VfDmaFftRespPtrHiRegVf = 0x000009AC,
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VRB1_VfQmgrAqResetVf = 0x00000E00,
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VRB1_VfQmgrRingSizeVf = 0x00000E04,
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VRB1_VfQmgrGrpDepthLog20Vf = 0x00000E08,
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VRB1_VfQmgrGrpDepthLog21Vf = 0x00000E0C,
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VRB1_VfQmgrGrpFunction0Vf = 0x00000E10,
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VRB1_VfQmgrGrpFunction1Vf = 0x00000E14,
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VRB1_VfPmACntrlRegVf = 0x00000F40,
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VRB1_VfPmACountVf = 0x00000F48,
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VRB1_VfPmAKCntLoVf = 0x00000F50,
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VRB1_VfPmAKCntHiVf = 0x00000F54,
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VRB1_VfPmADeltaCntLoVf = 0x00000F60,
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VRB1_VfPmADeltaCntHiVf = 0x00000F64,
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VRB1_VfPmBCntrlRegVf = 0x00000F80,
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VRB1_VfPmBCountVf = 0x00000F88,
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VRB1_VfPmBKCntLoVf = 0x00000F90,
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VRB1_VfPmBKCntHiVf = 0x00000F94,
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VRB1_VfPmBDeltaCntLoVf = 0x00000FA0,
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VRB1_VfPmBDeltaCntHiVf = 0x00000FA4,
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VRB1_VfPmCCntrlRegVf = 0x00000FC0,
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VRB1_VfPmCCountVf = 0x00000FC8,
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VRB1_VfPmCKCntLoVf = 0x00000FD0,
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VRB1_VfPmCKCntHiVf = 0x00000FD4,
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VRB1_VfPmCDeltaCntLoVf = 0x00000FE0,
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VRB1_VfPmCDeltaCntHiVf = 0x00000FE4
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};
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/* TIP VF Interrupt numbers */
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enum {
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ACC_VF_INT_QMGR_AQ_OVERFLOW = 0,
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ACC_VF_INT_DOORBELL_PF_2_VF = 1,
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ACC_VF_INT_ILLEGAL_FORMAT = 2,
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ACC_VF_INT_QMGR_DISABLED_ACCESS = 3,
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ACC_VF_INT_QMGR_AQ_OVERTHRESHOLD = 4,
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ACC_VF_INT_DMA_DL_DESC_IRQ = 5,
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ACC_VF_INT_DMA_UL_DESC_IRQ = 6,
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ACC_VF_INT_DMA_FFT_DESC_IRQ = 7,
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ACC_VF_INT_DMA_UL5G_DESC_IRQ = 8,
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ACC_VF_INT_DMA_DL5G_DESC_IRQ = 9,
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ACC_VF_INT_DMA_MLD_DESC_IRQ = 10,
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};
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#endif /* VRB1_VF_ENUM_H */
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