mirror of https://github.com/F-Stack/f-stack.git
126 lines
4.0 KiB
C
126 lines
4.0 KiB
C
/*
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* Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*
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* Copyright (c) 2014, Cisco Systems, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef _CQ_DESC_H_
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#define _CQ_DESC_H_
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/*
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* Completion queue descriptor types
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*/
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enum cq_desc_types {
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CQ_DESC_TYPE_WQ_ENET = 0,
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CQ_DESC_TYPE_DESC_COPY = 1,
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CQ_DESC_TYPE_WQ_EXCH = 2,
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CQ_DESC_TYPE_RQ_ENET = 3,
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CQ_DESC_TYPE_RQ_FCP = 4,
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CQ_DESC_TYPE_IOMMU_MISS = 5,
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CQ_DESC_TYPE_SGL = 6,
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CQ_DESC_TYPE_CLASSIFIER = 7,
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CQ_DESC_TYPE_TEST = 127,
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};
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/* Completion queue descriptor: 16B
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*
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* All completion queues have this basic layout. The
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* type_specfic area is unique for each completion
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* queue type.
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*/
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struct cq_desc {
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__le16 completed_index;
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__le16 q_number;
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u8 type_specfic[11];
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u8 type_color;
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};
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#define CQ_DESC_TYPE_BITS 4
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#define CQ_DESC_TYPE_MASK ((1 << CQ_DESC_TYPE_BITS) - 1)
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#define CQ_DESC_COLOR_MASK 1
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#define CQ_DESC_COLOR_SHIFT 7
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#define CQ_DESC_Q_NUM_BITS 10
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#define CQ_DESC_Q_NUM_MASK ((1 << CQ_DESC_Q_NUM_BITS) - 1)
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#define CQ_DESC_COMP_NDX_BITS 12
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#define CQ_DESC_COMP_NDX_MASK ((1 << CQ_DESC_COMP_NDX_BITS) - 1)
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static inline void cq_color_enc(struct cq_desc *desc, const u8 color)
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{
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if (color)
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desc->type_color |= (1 << CQ_DESC_COLOR_SHIFT);
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else
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desc->type_color &= ~(1 << CQ_DESC_COLOR_SHIFT);
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}
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static inline void cq_desc_enc(struct cq_desc *desc,
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const u8 type, const u8 color, const u16 q_number,
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const u16 completed_index)
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{
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desc->type_color = (type & CQ_DESC_TYPE_MASK) |
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((color & CQ_DESC_COLOR_MASK) << CQ_DESC_COLOR_SHIFT);
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desc->q_number = cpu_to_le16(q_number & CQ_DESC_Q_NUM_MASK);
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desc->completed_index = cpu_to_le16(completed_index &
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CQ_DESC_COMP_NDX_MASK);
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}
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static inline void cq_desc_dec(const struct cq_desc *desc_arg,
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u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
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{
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const struct cq_desc *desc = desc_arg;
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const u8 type_color = desc->type_color;
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*color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
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/*
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* Make sure color bit is read from desc *before* other fields
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* are read from desc. Hardware guarantees color bit is last
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* bit (byte) written. Adding the rmb() prevents the compiler
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* and/or CPU from reordering the reads which would potentially
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* result in reading stale values.
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*/
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rmb();
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*type = type_color & CQ_DESC_TYPE_MASK;
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*q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;
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*completed_index = le16_to_cpu(desc->completed_index) &
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CQ_DESC_COMP_NDX_MASK;
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}
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static inline void cq_color_dec(const struct cq_desc *desc_arg, u8 *color)
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{
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volatile const struct cq_desc *desc = desc_arg;
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*color = (desc->type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
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}
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#endif /* _CQ_DESC_H_ */
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