mirror of https://github.com/F-Stack/f-stack.git
175 lines
5.5 KiB
C
175 lines
5.5 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2014-2017 Chelsio Communications.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Chelsio Communications nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __T4_REGS_VALUES_H__
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#define __T4_REGS_VALUES_H__
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/*
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* This file contains definitions for various T4 register value hardware
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* constants. The types of values encoded here are predominantly those for
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* register fields which control "modal" behavior. For the most part, we do
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* not include definitions for register fields which are simple numeric
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* metrics, etc.
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*/
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/*
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* SGE definitions.
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* ================
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*/
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/*
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* SGE register field values.
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*/
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/* CONTROL register */
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#define X_RXPKTCPLMODE_SPLIT 1
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#define X_INGPCIEBOUNDARY_32B 0
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#define X_INGPADBOUNDARY_SHIFT 5
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#define X_INGPADBOUNDARY_32B 0
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#define X_T6_INGPADBOUNDARY_SHIFT 3
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#define X_T6_INGPADBOUNDARY_8B 0
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/* CONTROL2 register */
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#define X_INGPACKBOUNDARY_SHIFT 5
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#define X_INGPACKBOUNDARY_16B 0
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#define X_INGPACKBOUNDARY_64B 1
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/* GTS register */
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#define X_TIMERREG_RESTART_COUNTER 6
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#define X_TIMERREG_UPDATE_CIDX 7
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/*
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* Egress Context field values
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*/
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#define X_FETCHBURSTMIN_64B 2
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#define X_FETCHBURSTMIN_128B 3
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#define X_FETCHBURSTMAX_256B 2
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#define X_FETCHBURSTMAX_512B 3
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#define X_HOSTFCMODE_NONE 0
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/*
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* Ingress Context field values
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*/
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#define X_UPDATEDELIVERY_STATUS_PAGE 2
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#define X_RSPD_TYPE_FLBUF 0
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#define X_RSPD_TYPE_CPL 1
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/*
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* Context field definitions. This is by no means a complete list of SGE
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* Context fields. In the vast majority of cases the firmware initializes
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* things the way they need to be set up. But in a few small cases, we need
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* to compute new values and ship them off to the firmware to be applied to
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* the SGE Conexts ...
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*/
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/*
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* Congestion Manager Definitions.
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*/
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#define S_CONMCTXT_CNGTPMODE 19
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#define M_CONMCTXT_CNGTPMODE 0x3
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#define V_CONMCTXT_CNGTPMODE(x) ((x) << S_CONMCTXT_CNGTPMODE)
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#define G_CONMCTXT_CNGTPMODE(x) \
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(((x) >> S_CONMCTXT_CNGTPMODE) & M_CONMCTXT_CNGTPMODE)
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#define S_CONMCTXT_CNGCHMAP 0
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#define M_CONMCTXT_CNGCHMAP 0xffff
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#define V_CONMCTXT_CNGCHMAP(x) ((x) << S_CONMCTXT_CNGCHMAP)
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#define G_CONMCTXT_CNGCHMAP(x) \
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(((x) >> S_CONMCTXT_CNGCHMAP) & M_CONMCTXT_CNGCHMAP)
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#define X_CONMCTXT_CNGTPMODE_QUEUE 1
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#define X_CONMCTXT_CNGTPMODE_CHANNEL 2
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/*
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* T5 and later support a new BAR2-based doorbell mechanism for Egress Queues.
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* The User Doorbells are each 128 bytes in length with a Simple Doorbell at
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* offsets 8x and a Write Combining single 64-byte Egress Queue Unit
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* (X_IDXSIZE_UNIT) Gather Buffer interface at offset 64. For Ingress Queues,
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* we have a Going To Sleep register at offsets 8x+4.
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*
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* As noted above, we have many instances of the Simple Doorbell and Going To
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* Sleep registers at offsets 8x and 8x+4, respectively. We want to use a
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* non-64-byte aligned offset for the Simple Doorbell in order to attempt to
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* avoid buffering of the writes to the Simple Doorbell and we want to use a
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* non-contiguous offset for the Going To Sleep writes in order to avoid
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* possible combining between them.
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*/
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#define SGE_UDB_SIZE 128
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#define SGE_UDB_KDOORBELL 8
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#define SGE_UDB_GTS 20
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/*
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* CIM definitions.
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* ================
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*/
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/*
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* CIM register field values.
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*/
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#define X_MBOWNER_NONE 0
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#define X_MBOWNER_FW 1
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#define X_MBOWNER_PL 2
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/*
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* PCI-E definitions.
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* ==================
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*/
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#define X_WINDOW_SHIFT 10
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#define X_PCIEOFST_SHIFT 10
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/*
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* TP definitions.
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* ===============
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*/
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/*
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* TP_VLAN_PRI_MAP controls which subset of fields will be present in the
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* Compressed Filter Tuple for LE filters. Each bit set in TP_VLAN_PRI_MAP
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* selects for a particular field being present. These fields, when present
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* in the Compressed Filter Tuple, have the following widths in bits.
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*/
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#define W_FT_FCOE 1
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#define W_FT_PORT 3
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#define W_FT_VNIC_ID 17
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#define W_FT_VLAN 17
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#define W_FT_TOS 8
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#define W_FT_PROTOCOL 8
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#define W_FT_ETHERTYPE 16
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#define W_FT_MACMATCH 9
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#define W_FT_MPSHITTYPE 3
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#define W_FT_FRAGMENTATION 1
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#endif /* __T4_REGS_VALUES_H__ */
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