mirror of https://github.com/F-Stack/f-stack.git
94 lines
2.6 KiB
C
94 lines
2.6 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2020 Intel Corporation
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*/
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#ifndef _IFPGA_FME_RSU_H_
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#define _IFPGA_FME_RSU_H_
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#include "ifpga_hw.h"
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#define IFPGA_N3000_VID 0x8086
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#define IFPGA_N3000_DID 0x0b30
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#define IFPGA_BOOT_TYPE_FPGA 0
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#define IFPGA_BOOT_TYPE_BMC 1
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#define IFPGA_BOOT_PAGE_FACTORY 0
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#define IFPGA_BOOT_PAGE_USER 1
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#define IFPGA_RSU_DATA_BLK_SIZE 32768
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#define IFPGA_RSU_START_RETRY 120
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#define IFPGA_RSU_WRITE_RETRY 10
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#define IFPGA_RSU_CANCEL_RETRY 30
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#define IFPGA_N3000_COPY_SPEED 42700
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/* status */
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#define IFPGA_RSU_IDLE 0
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#define IFPGA_RSU_PREPARE 1
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#define IFPGA_RSU_READY 2
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#define IFPGA_RSU_COPYING 3
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#define IFPGA_RSU_REBOOT 4
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#define IFPGA_RSU_GET_STAT(v) (((v) >> 16) & 0xffff)
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#define IFPGA_RSU_GET_PROG(v) ((v) & 0xffff)
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#define IFPGA_RSU_STATUS(s, p) ((((s) << 16) & 0xffff0000) | ((p) & 0xffff))
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/* control */
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#define IFPGA_RSU_ABORT 1
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#define IFPGA_DUAL_CFG_CTRL0 0x200020
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#define IFPGA_DUAL_CFG_CTRL1 0x200024
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#define IFPGA_SEC_START_INTERVAL_MS 100
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#define IFPGA_SEC_START_TIMEOUT_MS 20000
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#define IFPGA_NIOS_HANDSHAKE_INTERVAL_MS 100
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#define IFPGA_NIOS_HANDSHAKE_TIMEOUT_MS 5000
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#define IFPGA_RSU_ERR_HW_ERROR -1
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#define IFPGA_RSU_ERR_TIMEOUT -2
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#define IFPGA_RSU_ERR_CANCELED -3
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#define IFPGA_RSU_ERR_BUSY -4
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#define IFPGA_RSU_ERR_INVALID_SIZE -5
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#define IFPGA_RSU_ERR_RW_ERROR -6
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#define IFPGA_RSU_ERR_WEAROUT -7
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#define IFPGA_RSU_ERR_FILE_READ -8
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struct ifpga_sec_mgr;
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struct ifpga_sec_ops {
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int (*prepare)(struct ifpga_sec_mgr *smgr);
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int (*write_blk)(struct ifpga_sec_mgr *smgr, char *buf, uint32_t offset,
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uint32_t size);
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int (*write_done)(struct ifpga_sec_mgr *smgr);
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int (*check_complete)(struct ifpga_sec_mgr *smgr);
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int (*reload)(struct ifpga_sec_mgr *smgr, int type, int page);
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int (*cancel)(struct ifpga_sec_mgr *smgr);
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void (*cleanup)(struct ifpga_sec_mgr *smgr);
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u64 (*get_hw_errinfo)(struct ifpga_sec_mgr *smgr);
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};
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struct ifpga_sec_mgr {
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struct ifpga_fme_hw *fme;
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struct intel_max10_device *max10_dev;
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unsigned int rsu_length;
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/* number of bytes that copied from staging area to working area
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* in one second, which is calculated by experiment
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*/
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unsigned int copy_speed;
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unsigned int *rsu_control;
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unsigned int *rsu_status;
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const struct ifpga_sec_ops *ops;
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};
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int init_sec_mgr(struct ifpga_fme_hw *fme);
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void release_sec_mgr(struct ifpga_fme_hw *fme);
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int fpga_update_flash(struct ifpga_fme_hw *fme, const char *image,
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uint64_t *status);
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int fpga_stop_flash_update(struct ifpga_fme_hw *fme, int force);
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int fpga_reload(struct ifpga_fme_hw *fme, int type, int page);
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#endif /* _IFPGA_FME_RSU_H_ */
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