mirror of https://github.com/F-Stack/f-stack.git
117 lines
3.1 KiB
C
117 lines
3.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2022 Intel Corporation
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*/
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#ifndef _QAT_ASYM_H_
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#define _QAT_ASYM_H_
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#include <cryptodev_pmd.h>
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#include <rte_crypto_asym.h>
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#include "icp_qat_fw_pke.h"
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#include "qat_device.h"
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#include "qat_crypto.h"
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#include "icp_qat_fw.h"
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/** Intel(R) QAT Asymmetric Crypto PMD driver name */
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#define CRYPTODEV_NAME_QAT_ASYM_PMD crypto_qat_asym
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typedef uint64_t large_int_ptr;
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#define MAX_PKE_PARAMS 8
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#define QAT_PKE_MAX_LN_SIZE 512
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#define _PKE_ALIGN_ __rte_aligned(8)
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#define QAT_ASYM_MAX_PARAMS 8
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#define QAT_ASYM_MODINV_NUM_IN_PARAMS 2
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#define QAT_ASYM_MODINV_NUM_OUT_PARAMS 1
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#define QAT_ASYM_MODEXP_NUM_IN_PARAMS 3
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#define QAT_ASYM_MODEXP_NUM_OUT_PARAMS 1
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#define QAT_ASYM_RSA_NUM_IN_PARAMS 3
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#define QAT_ASYM_RSA_NUM_OUT_PARAMS 1
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#define QAT_ASYM_RSA_QT_NUM_IN_PARAMS 6
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#define QAT_ASYM_ECDSA_RS_SIGN_IN_PARAMS 1
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#define QAT_ASYM_ECDSA_RS_SIGN_OUT_PARAMS 2
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#define QAT_ASYM_ECDSA_RS_VERIFY_IN_PARAMS 1
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#define QAT_ASYM_ECDSA_RS_VERIFY_OUT_PARAMS 0
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#define QAT_ASYM_ECPM_IN_PARAMS 7
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#define QAT_ASYM_ECPM_OUT_PARAMS 2
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/**
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* helper function to add an asym capability
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* <name> <op type> <modlen (min, max, increment)>
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**/
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#define QAT_ASYM_CAP(n, o, l, r, i) \
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{ \
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.op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC, \
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{.asym = { \
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.xform_capa = { \
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.xform_type = RTE_CRYPTO_ASYM_XFORM_##n,\
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.op_types = o, \
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{ \
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.modlen = { \
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.min = l, \
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.max = r, \
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.increment = i \
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}, } \
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} \
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}, \
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} \
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}
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struct qat_asym_op_cookie {
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uint64_t error;
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uint32_t alg_bytesize; /*< Bytesize of algorithm */
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uint32_t qat_func_alignsize; /*< Aligned bytesize of qat function */
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rte_iova_t input_addr;
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rte_iova_t output_addr;
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large_int_ptr input_params_ptrs[MAX_PKE_PARAMS] _PKE_ALIGN_;
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large_int_ptr output_params_ptrs[MAX_PKE_PARAMS] _PKE_ALIGN_;
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union {
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uint8_t input_array[MAX_PKE_PARAMS][QAT_PKE_MAX_LN_SIZE];
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uint8_t input_buffer[MAX_PKE_PARAMS * QAT_PKE_MAX_LN_SIZE];
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} _PKE_ALIGN_;
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uint8_t output_array[MAX_PKE_PARAMS][QAT_PKE_MAX_LN_SIZE] _PKE_ALIGN_;
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} _PKE_ALIGN_;
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struct qat_asym_session {
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struct icp_qat_fw_pke_request req_tmpl;
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struct rte_crypto_asym_xform xform;
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};
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static inline void
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qat_fill_req_tmpl(struct icp_qat_fw_pke_request *qat_req)
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{
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memset(qat_req, 0, sizeof(*qat_req));
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qat_req->pke_hdr.service_type = ICP_QAT_FW_COMN_REQ_CPM_FW_PKE;
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qat_req->pke_hdr.hdr_flags =
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ICP_QAT_FW_COMN_HDR_FLAGS_BUILD
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(ICP_QAT_FW_COMN_REQ_FLAG_SET);
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}
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static inline void
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qat_asym_build_req_tmpl(void *sess_private_data)
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{
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struct icp_qat_fw_pke_request *qat_req;
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struct qat_asym_session *session = sess_private_data;
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qat_req = &session->req_tmpl;
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qat_fill_req_tmpl(qat_req);
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}
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int
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qat_asym_session_configure(struct rte_cryptodev *dev __rte_unused,
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struct rte_crypto_asym_xform *xform,
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struct rte_cryptodev_asym_session *sess);
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unsigned int
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qat_asym_session_get_private_size(struct rte_cryptodev *dev);
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void
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qat_asym_session_clear(struct rte_cryptodev *dev,
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struct rte_cryptodev_asym_session *sess);
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void
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qat_asym_init_op_cookie(void *cookie);
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#endif /* _QAT_ASYM_H_ */
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