mirror of https://github.com/F-Stack/f-stack.git
151 lines
4.0 KiB
C
151 lines
4.0 KiB
C
/*-
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* Copyright (c) 2015 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Semihalf under
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* the sponsorship of the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _GIC_V3_VAR_H_
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#define _GIC_V3_VAR_H_
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#include <arm/arm/gic_common.h>
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#define GIC_V3_DEVSTR "ARM Generic Interrupt Controller v3.0"
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DECLARE_CLASS(gic_v3_driver);
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struct gic_v3_irqsrc;
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struct redist_pcpu {
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struct resource res; /* mem resource for redist */
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vm_offset_t pend_base;
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bool lpi_enabled; /* redist LPI configured? */
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};
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struct gic_redists {
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/*
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* Re-Distributor region description.
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* We will have few of those depending
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* on the #redistributor-regions property in FDT.
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*/
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struct resource ** regions;
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/* Number of Re-Distributor regions */
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u_int nregions;
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/* Per-CPU Re-Distributor data */
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struct redist_pcpu *pcpu[MAXCPU];
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};
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struct gic_v3_softc {
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device_t dev;
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struct resource ** gic_res;
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struct mtx gic_mtx;
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/* Distributor */
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struct resource * gic_dist;
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/* Re-Distributors */
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struct gic_redists gic_redists;
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/* Message Based Interrupts */
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u_int gic_mbi_start;
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u_int gic_mbi_end;
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struct mtx gic_mbi_mtx;
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uint32_t gic_pidr2;
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u_int gic_bus;
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u_int gic_nirqs;
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u_int gic_idbits;
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boolean_t gic_registered;
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int gic_nchildren;
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device_t *gic_children;
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struct intr_pic *gic_pic;
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struct gic_v3_irqsrc *gic_irqs;
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};
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struct gic_v3_devinfo {
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int gic_domain;
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int msi_xref;
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};
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#define GIC_INTR_ISRC(sc, irq) (&sc->gic_irqs[irq].gi_isrc)
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MALLOC_DECLARE(M_GIC_V3);
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/* ivars */
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#define GICV3_IVAR_NIRQS 1000
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/* 1001 was GICV3_IVAR_REDIST_VADDR */
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#define GICV3_IVAR_REDIST 1002
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__BUS_ACCESSOR(gicv3, nirqs, GICV3, NIRQS, u_int);
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__BUS_ACCESSOR(gicv3, redist, GICV3, REDIST, void *);
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/* Device methods */
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int gic_v3_attach(device_t dev);
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int gic_v3_detach(device_t dev);
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int arm_gic_v3_intr(void *);
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uint32_t gic_r_read_4(device_t, bus_size_t);
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uint64_t gic_r_read_8(device_t, bus_size_t);
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void gic_r_write_4(device_t, bus_size_t, uint32_t var);
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void gic_r_write_8(device_t, bus_size_t, uint64_t var);
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/*
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* GIC Distributor accessors.
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* Notice that only GIC sofc can be passed.
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*/
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#define gic_d_read(sc, len, reg) \
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({ \
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bus_read_##len(sc->gic_dist, reg); \
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})
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#define gic_d_write(sc, len, reg, val) \
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({ \
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bus_write_##len(sc->gic_dist, reg, val);\
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})
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/* GIC Re-Distributor accessors (per-CPU) */
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#define gic_r_read(sc, len, reg) \
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({ \
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u_int cpu = PCPU_GET(cpuid); \
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\
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bus_read_##len( \
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&sc->gic_redists.pcpu[cpu]->res, \
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reg); \
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})
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#define gic_r_write(sc, len, reg, val) \
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({ \
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u_int cpu = PCPU_GET(cpuid); \
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\
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bus_write_##len( \
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&sc->gic_redists.pcpu[cpu]->res, \
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reg, val); \
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})
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#endif /* _GIC_V3_VAR_H_ */
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