mirror of https://github.com/F-Stack/f-stack.git
98 lines
3.2 KiB
ReStructuredText
98 lines
3.2 KiB
ReStructuredText
.. SPDX-License-Identifier: BSD-3-Clause
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Copyright(c) 2021 Marvell International Ltd.
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.. include:: <isonum.txt>
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CNXK DMA Device Driver
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======================
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The ``cnxk`` dmadev driver provides a poll-mode driver (PMD) for Marvell DPI DMA
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Hardware Accelerator block found in OCTEON 9 and OCTEON 10 family of SoCs.
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Each DMA queue is exposed as a VF function when SRIOV is enabled.
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The block supports following modes of DMA transfers:
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#. Internal - DMA within SoC DRAM to DRAM
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#. Inbound - Host DRAM to SoC DRAM when SoC is in PCIe Endpoint
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#. Outbound - SoC DRAM to Host DRAM when SoC is in PCIe Endpoint
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Prerequisites and Compilation procedure
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---------------------------------------
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See :doc:`../platform/cnxk` for setup information.
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Device Setup
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-------------
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The ``dpdk-devbind.py`` script, included with DPDK,
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can be used to show the presence of supported hardware.
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Running ``dpdk-devbind.py --status-dev dma`` will show all the CNXK DMA devices.
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Devices using VFIO drivers
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~~~~~~~~~~~~~~~~~~~~~~~~~~
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The HW devices to be used will need to be bound to a user-space IO driver for use.
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The ``dpdk-devbind.py`` script can be used to view the state of the devices
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and to bind them to a suitable DPDK-supported driver, such as ``vfio-pci``.
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For example::
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$ dpdk-devbind.py -b vfio-pci 0000:05:00.1
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Device Probing and Initialization
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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To use the devices from an application, the dmadev API can be used.
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CNXK DMA device configuration requirements:
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* Only one ``vchan`` is supported per device.
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* CNXK DMA devices do not support silent mode.
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Once configured, the device can then be made ready for use
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by calling the ``rte_dma_start()`` API.
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Performing Data Copies
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~~~~~~~~~~~~~~~~~~~~~~
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Refer to the :ref:`Enqueue / Dequeue APIs <dmadev_enqueue_dequeue>` section
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of the dmadev library documentation
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for details on operation enqueue and submission API usage.
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Performance Tuning Parameters
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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To achieve higher performance, DMA device needs to be tuned
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using PF kernel driver module parameters.
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The PF kernel driver is part of the OCTEON SDK.
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Module parameters shall be configured during module insert as in below example::
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$ sudo insmod octeontx2_dpi.ko mps=128 mrrs=128 eng_fifo_buf=0x101008080808
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``mps``
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Maximum payload size.
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MPS size shall not exceed the size selected by PCI config.
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Maximum size that shall be configured can be found
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on executing ``lspci`` command for the device.
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``mrrs``
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Maximum read request size.
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MRRS size shall not exceed the size selected by PCI config.
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Maximum size that shall be configured can be found
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on executing ``lspci`` command for the device.
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``eng_fifo_buf``
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CNXK supports 6 DMA engines and each engine has an associated FIFO.
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By default, all engine's FIFO is configured to 8 KB.
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Engine FIFO size can be tuned using this 64-bit variable,
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where each byte represents an engine.
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In the example above, engine 0-3 FIFO are configure as 8 KB
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and engine 4-5 are configured as 16 KB.
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.. note::
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MPS and MRRS performance tuning parameters help achieve higher performance
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only for inbound and outbound DMA transfers.
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The parameter has no effect for internal only DMA transfer.
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