mirror of https://github.com/F-Stack/f-stack.git
170 lines
7.2 KiB
ReStructuredText
170 lines
7.2 KiB
ReStructuredText
.. SPDX-License-Identifier: BSD-3-Clause
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Copyright(c) 2022 Intel Corporation
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.. include:: <isonum.txt>
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Intel\ |reg| vRAN Boost Poll Mode Driver (PMD)
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==============================================
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The Intel\ |reg| vRAN Boost integrated accelerator enables
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cost-effective 4G and 5G next-generation virtualized Radio Access Network (vRAN)
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solutions.
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The Intel vRAN Boost v1.0 (VRB1 in the code) is specifically integrated on the
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4th Gen Intel\ |reg| Xeon\ |reg| Scalable processor with Intel\ |reg| vRAN Boost,
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also known as Sapphire Rapids Edge Enhanced (SPR-EE).
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Features
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--------
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Intel vRAN Boost v1.0 includes a 5G Low Density Parity Check (LDPC) encoder/decoder,
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rate match/dematch, Hybrid Automatic Repeat Request (HARQ) with access to DDR
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memory for buffer management, a 4G Turbo encoder/decoder,
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a Fast Fourier Transform (FFT) block providing DFT/iDFT processing offload
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for the 5G Sounding Reference Signal (SRS), a Queue Manager (QMGR),
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and a DMA subsystem.
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There is no dedicated on-card memory for HARQ, the coherent memory on the CPU side is being used.
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These hardware blocks provide the following features exposed by the PMD:
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- LDPC Encode in the Downlink (5GNR)
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- LDPC Decode in the Uplink (5GNR)
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- Turbo Encode in the Downlink (4G)
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- Turbo Decode in the Uplink (4G)
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- FFT processing
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- Single Root I/O Virtualization (SR-IOV) with 16 Virtual Functions (VFs) per Physical Function (PF)
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- Maximum of 256 queues per VF
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- Message Signaled Interrupts (MSIs)
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The Intel vRAN Boost v1.0 PMD supports the following bbdev capabilities:
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* For the LDPC encode operation:
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- ``RTE_BBDEV_LDPC_CRC_24B_ATTACH``: set to attach CRC24B to CB(s).
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- ``RTE_BBDEV_LDPC_RATE_MATCH``: if set then do not do Rate Match bypass.
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- ``RTE_BBDEV_LDPC_INTERLEAVER_BYPASS``: if set then bypass interleaver.
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* For the LDPC decode operation:
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- ``RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK``: check CRC24B from CB(s).
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- ``RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP``: drops CRC24B bits appended while decoding.
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- ``RTE_BBDEV_LDPC_CRC_TYPE_24A_CHECK``: check CRC24A from CB(s).
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- ``RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK``: check CRC16 from CB(s).
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- ``RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE``: provides an input for HARQ combining.
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- ``RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE``: provides an input for HARQ combining.
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- ``RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE``: disable early termination.
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- ``RTE_BBDEV_LDPC_DEC_SCATTER_GATHER``: supports scatter-gather for input/output data.
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- ``RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION``: supports compression of the HARQ input/output.
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- ``RTE_BBDEV_LDPC_LLR_COMPRESSION``: supports LLR input compression.
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* For the turbo encode operation:
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- ``RTE_BBDEV_TURBO_CRC_24B_ATTACH``: set to attach CRC24B to CB(s).
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- ``RTE_BBDEV_TURBO_RATE_MATCH``: if set then do not do Rate Match bypass.
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- ``RTE_BBDEV_TURBO_ENC_INTERRUPTS``: set for encoder dequeue interrupts.
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- ``RTE_BBDEV_TURBO_RV_INDEX_BYPASS``: set to bypass RV index.
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- ``RTE_BBDEV_TURBO_ENC_SCATTER_GATHER``: supports scatter-gather for input/output data.
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* For the turbo decode operation:
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- ``RTE_BBDEV_TURBO_CRC_TYPE_24B``: check CRC24B from CB(s).
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- ``RTE_BBDEV_TURBO_SUBBLOCK_DEINTERLEAVE``: perform subblock de-interleave.
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- ``RTE_BBDEV_TURBO_DEC_INTERRUPTS``: set for decoder dequeue interrupts.
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- ``RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN``: set if negative LLR input is supported.
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- ``RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP``: keep CRC24B bits appended while decoding.
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- ``RTE_BBDEV_TURBO_DEC_CRC_24B_DROP``: option to drop the code block CRC after decoding.
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- ``RTE_BBDEV_TURBO_EARLY_TERMINATION``: set early termination feature.
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- ``RTE_BBDEV_TURBO_DEC_SCATTER_GATHER``: supports scatter-gather for input/output data.
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- ``RTE_BBDEV_TURBO_HALF_ITERATION_EVEN``: set half iteration granularity.
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- ``RTE_BBDEV_TURBO_CONTINUE_CRC_MATCH``: set to run an extra odd iteration after CRC match.
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- ``RTE_BBDEV_TURBO_MAP_DEC``: supports flexible parallel MAP engine decoding.
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* For the FFT operation:
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- ``RTE_BBDEV_FFT_WINDOWING``: flexible windowing capability.
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- ``RTE_BBDEV_FFT_CS_ADJUSTMENT``: flexible adjustment of Cyclic Shift time offset.
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- ``RTE_BBDEV_FFT_DFT_BYPASS``: set for bypass the DFT and get directly into iDFT input.
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- ``RTE_BBDEV_FFT_IDFT_BYPASS``: set for bypass the IDFT and get directly the DFT output.
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- ``RTE_BBDEV_FFT_WINDOWING_BYPASS``: set for bypass time domain windowing.
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Installation
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------------
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Section 3 of the DPDK manual provides instructions on installing and compiling DPDK.
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DPDK requires hugepages to be configured as detailed in section 2 of the DPDK manual.
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The bbdev test application has been tested with a configuration 40 x 1GB hugepages.
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The hugepage configuration of a server may be examined using:
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.. code-block:: console
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grep Huge* /proc/meminfo
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Initialization
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--------------
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When the device first powers up, its PCI Physical Functions (PF)
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can be listed through these commands for Intel vRAN Boost v1:
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.. code-block:: console
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sudo lspci -vd8086:57c0
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The physical and virtual functions are compatible with Linux UIO drivers:
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``vfio_pci`` and ``igb_uio``.
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However, in order to work the 5G/4G FEC device first needs to be bound
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to one of these Linux drivers through DPDK.
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For more details on how to bind the PF device and create VF devices, see
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:ref:`linux_gsg_binding_kernel`.
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Configure the VFs through PF
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The PCI virtual functions must be configured before working or getting assigned
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to VMs/Containers.
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The configuration involves allocating the number of hardware queues, priorities,
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load balance, bandwidth and other settings necessary for the device
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to perform FEC functions.
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This configuration needs to be executed at least once after reboot or PCI FLR
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and can be achieved by using the functions ``rte_acc200_configure()``,
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which sets up the parameters defined in the compatible ``acc200_conf`` structure.
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Test Application
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----------------
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BBDEV provides a test application, ``test-bbdev.py`` and range of test data for testing
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the functionality of the device, depending on the device's capabilities.
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For more details on how to use the test application,
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see :ref:`test_bbdev_application`.
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Test Vectors
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~~~~~~~~~~~~
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In addition to the simple LDPC decoder and LDPC encoder tests,
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bbdev also provides a range of additional tests under the test_vectors folder,
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which may be useful.
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The results of these tests will depend on the device capabilities which may
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cause some test cases to be skipped, but no failure should be reported.
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Alternate Baseband Device configuration tool
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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On top of the embedded configuration feature supported in test-bbdev using
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"- -init-device" option mentioned above, there is also a tool available
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to perform that device configuration using a companion application.
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The ``pf_bb_config`` application notably enables then to run bbdev-test
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from the VF and not only limited to the PF as captured above.
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See for more details: https://github.com/intel/pf-bb-config
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Specifically for the bbdev Intel vRAN Boost v1 PMD, the command below can be used
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(note that ACC200 was used previously to refer to VRB1):
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.. code-block:: console
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pf_bb_config ACC200 -c ./acc200/acc200_config_vf_5g.cfg
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test-bbdev.py -e="-c 0xff0 -a${VF_PCI_ADDR}" -c validation -n 64 -b 64 -l 1 -v ./ldpc_dec_default.data
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