2021-08-31 11:00:09 +00:00
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/*
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* Copyright 2008-2012 Freescale Semiconductor Inc.
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2017-04-21 10:43:26 +00:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2021-08-31 11:00:09 +00:00
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2017-04-21 10:43:26 +00:00
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/******************************************************************************
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@File tgec.h
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@Description FM 10G MAC ...
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*//***************************************************************************/
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#ifndef __TGEC_H
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#define __TGEC_H
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#include "std_ext.h"
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#include "error_ext.h"
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#include "list_ext.h"
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2021-08-31 11:00:09 +00:00
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#include "enet_ext.h"
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2017-04-21 10:43:26 +00:00
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#include "tgec_mii_acc.h"
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#include "fm_mac.h"
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2021-08-31 11:00:09 +00:00
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#define DEFAULT_exceptions \
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((uint32_t)(TGEC_IMASK_MDIO_SCAN_EVENT | \
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TGEC_IMASK_REM_FAULT | \
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TGEC_IMASK_LOC_FAULT | \
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TGEC_IMASK_TX_ECC_ER | \
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TGEC_IMASK_TX_FIFO_UNFL | \
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TGEC_IMASK_TX_FIFO_OVFL | \
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TGEC_IMASK_TX_ER | \
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TGEC_IMASK_RX_FIFO_OVFL | \
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TGEC_IMASK_RX_ECC_ER | \
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TGEC_IMASK_RX_JAB_FRM | \
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TGEC_IMASK_RX_OVRSZ_FRM | \
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TGEC_IMASK_RX_RUNT_FRM | \
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TGEC_IMASK_RX_FRAG_FRM | \
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TGEC_IMASK_RX_CRC_ER | \
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TGEC_IMASK_RX_ALIGN_ER))
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#define GET_EXCEPTION_FLAG(bitMask, exception) switch (exception){ \
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case e_FM_MAC_EX_10G_MDIO_SCAN_EVENTMDIO: \
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bitMask = TGEC_IMASK_MDIO_SCAN_EVENT ; break; \
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case e_FM_MAC_EX_10G_MDIO_CMD_CMPL: \
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bitMask = TGEC_IMASK_MDIO_CMD_CMPL ; break; \
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case e_FM_MAC_EX_10G_REM_FAULT: \
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bitMask = TGEC_IMASK_REM_FAULT ; break; \
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case e_FM_MAC_EX_10G_LOC_FAULT: \
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bitMask = TGEC_IMASK_LOC_FAULT ; break; \
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case e_FM_MAC_EX_10G_1TX_ECC_ER: \
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bitMask = TGEC_IMASK_TX_ECC_ER ; break; \
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case e_FM_MAC_EX_10G_TX_FIFO_UNFL: \
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bitMask = TGEC_IMASK_TX_FIFO_UNFL ; break; \
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case e_FM_MAC_EX_10G_TX_FIFO_OVFL: \
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bitMask = TGEC_IMASK_TX_FIFO_OVFL ; break; \
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case e_FM_MAC_EX_10G_TX_ER: \
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bitMask = TGEC_IMASK_TX_ER ; break; \
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case e_FM_MAC_EX_10G_RX_FIFO_OVFL: \
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bitMask = TGEC_IMASK_RX_FIFO_OVFL ; break; \
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case e_FM_MAC_EX_10G_RX_ECC_ER: \
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bitMask = TGEC_IMASK_RX_ECC_ER ; break; \
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case e_FM_MAC_EX_10G_RX_JAB_FRM: \
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bitMask = TGEC_IMASK_RX_JAB_FRM ; break; \
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case e_FM_MAC_EX_10G_RX_OVRSZ_FRM: \
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bitMask = TGEC_IMASK_RX_OVRSZ_FRM ; break; \
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case e_FM_MAC_EX_10G_RX_RUNT_FRM: \
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bitMask = TGEC_IMASK_RX_RUNT_FRM ; break; \
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case e_FM_MAC_EX_10G_RX_FRAG_FRM: \
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bitMask = TGEC_IMASK_RX_FRAG_FRM ; break; \
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case e_FM_MAC_EX_10G_RX_LEN_ER: \
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bitMask = TGEC_IMASK_RX_LEN_ER ; break; \
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case e_FM_MAC_EX_10G_RX_CRC_ER: \
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bitMask = TGEC_IMASK_RX_CRC_ER ; break; \
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case e_FM_MAC_EX_10G_RX_ALIGN_ER: \
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bitMask = TGEC_IMASK_RX_ALIGN_ER ; break; \
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2017-04-21 10:43:26 +00:00
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default: bitMask = 0;break;}
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#define MAX_PACKET_ALIGNMENT 31
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#define MAX_INTER_PACKET_GAP 0x7f
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#define MAX_INTER_PALTERNATE_BEB 0x0f
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#define MAX_RETRANSMISSION 0x0f
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#define MAX_COLLISION_WINDOW 0x03ff
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#define TGEC_NUM_OF_PADDRS 1 /* number of pattern match registers (entries) */
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#define GROUP_ADDRESS 0x0000010000000000LL /* Group address bit indication */
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#define HASH_TABLE_SIZE 512 /* Hash table size (= 32 bits * 8 regs) */
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#define TGEC_TO_MII_OFFSET 0x1030 /* Offset from the MEM map to the MDIO mem map */
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/* 10-gigabit Ethernet MAC Controller ID (10GEC_ID) */
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#define TGEC_ID_ID 0xffff0000
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#define TGEC_ID_MAC_VERSION 0x0000FF00
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#define TGEC_ID_MAC_REV 0x000000ff
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typedef struct {
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t_FmMacControllerDriver fmMacControllerDriver; /**< Upper Mac control block */
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t_Handle h_App; /**< Handle to the upper layer application */
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struct tgec_regs *p_MemMap; /**< pointer to 10G memory mapped registers. */
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t_TgecMiiAccessMemMap *p_MiiMemMap; /**< pointer to MII memory mapped registers. */
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uint64_t addr; /**< MAC address of device; */
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e_EnetMode enetMode; /**< Ethernet physical interface */
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t_FmMacExceptionCallback *f_Exception;
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int mdioIrq;
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t_FmMacExceptionCallback *f_Event;
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bool indAddrRegUsed[TGEC_NUM_OF_PADDRS]; /**< Whether a particular individual address recognition register is being used */
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uint64_t paddr[TGEC_NUM_OF_PADDRS]; /**< MAC address for particular individual address recognition register */
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uint8_t numOfIndAddrInRegs; /**< Number of individual addresses in registers for this station. */
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t_EthHash *p_MulticastAddrHash; /**< pointer to driver's global address hash table */
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t_EthHash *p_UnicastAddrHash; /**< pointer to driver's individual address hash table */
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bool debugMode;
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uint8_t macId;
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uint32_t exceptions;
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struct tgec_cfg *p_TgecDriverParam;
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} t_Tgec;
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t_Error TGEC_MII_WritePhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t data);
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t_Error TGEC_MII_ReadPhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
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#endif /* __TGEC_H */
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