mirror of https://github.com/F-Stack/f-stack.git
121 lines
4.8 KiB
C
121 lines
4.8 KiB
C
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/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/******************************************************************************
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@File dtsec_mii_acc.c
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@Description FM dtsec MII register access MAC ...
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*//***************************************************************************/
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#include "error_ext.h"
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#include "std_ext.h"
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#include "fm_mac.h"
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#include "dtsec.h"
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/*****************************************************************************/
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t_Error DTSEC_MII_WritePhyReg(t_Handle h_Dtsec,
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uint8_t phyAddr,
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uint8_t reg,
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uint16_t data)
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{
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t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
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t_MiiAccessMemMap *p_MiiAccess;
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uint32_t tmpReg;
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SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
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SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MiiMemMap, E_INVALID_HANDLE);
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p_MiiAccess = p_Dtsec->p_MiiMemMap;
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/* Stop the MII management read cycle */
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WRITE_UINT32(p_MiiAccess->miimcom, 0);
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/* Dummy read to make sure MIIMCOM is written */
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tmpReg = GET_UINT32(p_MiiAccess->miimcom);
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/* Setting up MII Management Address Register */
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tmpReg = (uint32_t)((phyAddr << MIIMADD_PHY_ADDR_SHIFT) | reg);
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WRITE_UINT32(p_MiiAccess->miimadd, tmpReg);
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/* Setting up MII Management Control Register with data */
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WRITE_UINT32(p_MiiAccess->miimcon, (uint32_t)data);
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/* Dummy read to make sure MIIMCON is written */
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tmpReg = GET_UINT32(p_MiiAccess->miimcon);
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/* Wait till MII management write is complete */
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while ((GET_UINT32(p_MiiAccess->miimind)) & MIIMIND_BUSY) ;
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return E_OK;
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}
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/*****************************************************************************/
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t_Error DTSEC_MII_ReadPhyReg(t_Handle h_Dtsec,
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uint8_t phyAddr,
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uint8_t reg,
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uint16_t *p_Data)
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{
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t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
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t_MiiAccessMemMap *p_MiiAccess;
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uint32_t tmpReg;
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SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
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SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MiiMemMap, E_INVALID_HANDLE);
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p_MiiAccess = p_Dtsec->p_MiiMemMap;
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/* Setting up the MII Management Address Register */
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tmpReg = (uint32_t)((phyAddr << MIIMADD_PHY_ADDR_SHIFT) | reg);
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WRITE_UINT32(p_MiiAccess->miimadd, tmpReg);
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/* Perform an MII management read cycle */
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WRITE_UINT32(p_MiiAccess->miimcom, MIIMCOM_READ_CYCLE);
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/* Dummy read to make sure MIIMCOM is written */
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tmpReg = GET_UINT32(p_MiiAccess->miimcom);
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/* Wait till MII management read is complete */
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while ((GET_UINT32(p_MiiAccess->miimind)) & MIIMIND_BUSY) ;
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/* Read MII management status */
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*p_Data = (uint16_t)GET_UINT32(p_MiiAccess->miimstat);
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WRITE_UINT32(p_MiiAccess->miimcom, 0);
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/* Dummy read to make sure MIIMCOM is written */
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tmpReg = GET_UINT32(p_MiiAccess->miimcom);
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if (*p_Data == 0xffff)
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RETURN_ERROR(MINOR, E_NO_DEVICE,
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("Read wrong data (0xffff): phyAddr 0x%x, reg 0x%x",
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phyAddr, reg));
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return E_OK;
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}
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