2019-06-25 11:12:58 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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2017-04-21 10:43:26 +00:00
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*
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2019-06-25 11:12:58 +00:00
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* Copyright 2017 NXP
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2017-04-21 10:43:26 +00:00
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*
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*/
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2018-05-15 09:49:22 +00:00
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#ifndef __DPAA_MEMPOOL_H__
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#define __DPAA_MEMPOOL_H__
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2017-04-21 10:43:26 +00:00
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2018-05-15 09:49:22 +00:00
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/* System headers */
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#include <stdio.h>
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#include <stdbool.h>
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#include <inttypes.h>
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#include <unistd.h>
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2017-04-21 10:43:26 +00:00
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#include <rte_mempool.h>
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2018-05-15 09:49:22 +00:00
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#include <rte_dpaa_bus.h>
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#include <rte_dpaa_logs.h>
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2017-04-21 10:43:26 +00:00
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2018-05-15 09:49:22 +00:00
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#include <fsl_usd.h>
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#include <fsl_bman.h>
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2017-04-21 10:43:26 +00:00
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2018-05-15 09:49:22 +00:00
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#define CPU_SPIN_BACKOFF_CYCLES 512
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/* total number of bpools on SoC */
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#define DPAA_MAX_BPOOLS 256
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/* Maximum release/acquire from BMAN */
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#define DPAA_MBUF_MAX_ACQ_REL 8
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2019-06-25 11:12:58 +00:00
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/* Buffers are allocated from single mem segment i.e. phys contiguous */
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#define DPAA_MPOOL_SINGLE_SEGMENT 0x01
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2018-05-15 09:49:22 +00:00
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struct dpaa_bp_info {
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struct rte_mempool *mp;
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struct bman_pool *bp;
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uint32_t bpid;
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uint32_t size;
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uint32_t meta_data_size;
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int32_t dpaa_ops_index;
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2019-06-25 11:12:58 +00:00
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int64_t ptov_off;
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uint8_t flags;
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2018-05-15 09:49:22 +00:00
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};
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2019-06-25 11:12:58 +00:00
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static inline void *
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DPAA_MEMPOOL_PTOV(struct dpaa_bp_info *bp_info __rte_unused, uint64_t addr)
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{
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return rte_dpaa_mem_ptov(addr);
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}
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2018-05-15 09:49:22 +00:00
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#define DPAA_MEMPOOL_TO_POOL_INFO(__mp) \
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((struct dpaa_bp_info *)__mp->pool_data)
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#define DPAA_MEMPOOL_TO_BPID(__mp) \
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(((struct dpaa_bp_info *)__mp->pool_data)->bpid)
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extern struct dpaa_bp_info rte_dpaa_bpid_info[DPAA_MAX_BPOOLS];
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#define DPAA_BPID_TO_POOL_INFO(__bpid) (&rte_dpaa_bpid_info[__bpid])
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2017-04-21 10:43:26 +00:00
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#endif
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