2019-06-25 11:12:58 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2014 Intel Corporation
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2017-04-21 10:43:26 +00:00
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*/
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#ifndef _IXGBE_BYPASS_H_
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#define _IXGBE_BYPASS_H_
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2018-05-15 09:49:22 +00:00
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#ifdef RTE_LIBRTE_IXGBE_BYPASS
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2017-04-21 10:43:26 +00:00
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struct ixgbe_bypass_mac_ops {
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s32 (*bypass_rw)(struct ixgbe_hw *hw, u32 cmd, u32 *status);
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bool (*bypass_valid_rd)(u32 in_reg, u32 out_reg);
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s32 (*bypass_set)(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);
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s32 (*bypass_rd_eep)(struct ixgbe_hw *hw, u32 addr, u8 *value);
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};
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struct ixgbe_bypass_info {
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uint64_t reset_tm;
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struct ixgbe_bypass_mac_ops ops;
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};
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struct rte_eth_dev;
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void ixgbe_bypass_init(struct rte_eth_dev *dev);
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s32 ixgbe_bypass_state_show(struct rte_eth_dev *dev, u32 *state);
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s32 ixgbe_bypass_state_store(struct rte_eth_dev *dev, u32 *new_state);
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s32 ixgbe_bypass_event_show(struct rte_eth_dev *dev, u32 event, u32 *state);
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s32 ixgbe_bypass_event_store(struct rte_eth_dev *dev, u32 event, u32 state);
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s32 ixgbe_bypass_wd_timeout_store(struct rte_eth_dev *dev, u32 timeout);
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s32 ixgbe_bypass_ver_show(struct rte_eth_dev *dev, u32 *ver);
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s32 ixgbe_bypass_wd_timeout_show(struct rte_eth_dev *dev, u32 *wd_timeout);
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s32 ixgbe_bypass_wd_reset(struct rte_eth_dev *dev);
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s32 ixgbe_bypass_init_shared_code(struct ixgbe_hw *hw);
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s32 ixgbe_bypass_init_hw(struct ixgbe_hw *hw);
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2018-05-15 09:49:22 +00:00
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#endif /* RTE_LIBRTE_IXGBE_BYPASS */
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2017-04-21 10:43:26 +00:00
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#endif /* _IXGBE_BYPASS_H_ */
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