mirror of https://github.com/F-Stack/f-stack.git
41 lines
1.3 KiB
C
41 lines
1.3 KiB
C
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2022 Intel Corporation
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*/
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/* ACC101 PCI vendor & device IDs */
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#define ACC101_VENDOR_ID (0x8086)
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#define ACC101_PF_DEVICE_ID (0x57c4)
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#define ACC101_VF_DEVICE_ID (0x57c5)
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/* Number of Virtual Functions ACC101 supports */
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#define ACC101_NUM_VFS 16
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#define ACC101_NUM_QGRPS 8
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#define ACC101_NUM_AQS 16
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#define ACC101_WORDS_IN_ARAM_SIZE (128 * 1024 / 4)
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/* Mapping of signals for the available engines */
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#define ACC101_SIG_UL_5G 0
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#define ACC101_SIG_UL_5G_LAST 8
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#define ACC101_SIG_DL_5G 13
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#define ACC101_SIG_DL_5G_LAST 15
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#define ACC101_SIG_UL_4G 16
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#define ACC101_SIG_UL_4G_LAST 19
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#define ACC101_SIG_DL_4G 27
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#define ACC101_SIG_DL_4G_LAST 31
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#define ACC101_NUM_ACCS 5
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/* ACC101 Configuration */
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#define ACC101_CFG_DMA_ERROR 0x3D7
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#define ACC101_CFG_AXI_CACHE 0x11
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#define ACC101_CFG_QMGR_HI_P 0x0F0F
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#define ACC101_CFG_PCI_AXI 0xC003
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#define ACC101_CFG_PCI_BRIDGE 0x40006033
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#define ACC101_GPEX_AXIMAP_NUM 17
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#define ACC101_CLOCK_GATING_EN 0x30000
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#define ACC101_DMA_INBOUND 0x104
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/* DDR Size per VF - 512MB by default
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* Can be increased up to 4 GB with single PF/VF
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*/
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#define ACC101_HARQ_DDR (512 * 1)
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