2019-01-18 09:27:45 +00:00
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/*-
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* BSD LICENSE
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2018-05-15 09:49:22 +00:00
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*
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* Copyright 2013-2016 Freescale Semiconductor Inc.
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2019-01-18 09:27:45 +00:00
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* Copyright 2016-2017 NXP.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the above-listed copyright holders nor the
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* names of any contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* GPL LICENSE SUMMARY
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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2018-05-15 09:49:22 +00:00
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*
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2019-01-18 09:27:45 +00:00
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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2018-05-15 09:49:22 +00:00
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*/
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#ifndef _FSL_DPIO_CMD_H
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#define _FSL_DPIO_CMD_H
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/* DPIO Version */
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#define DPIO_VER_MAJOR 4
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#define DPIO_VER_MINOR 2
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#define DPIO_CMD_BASE_VERSION 1
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#define DPIO_CMD_ID_OFFSET 4
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#define DPIO_CMD(id) (((id) << DPIO_CMD_ID_OFFSET) | DPIO_CMD_BASE_VERSION)
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/* Command IDs */
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#define DPIO_CMDID_CLOSE DPIO_CMD(0x800)
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#define DPIO_CMDID_OPEN DPIO_CMD(0x803)
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#define DPIO_CMDID_CREATE DPIO_CMD(0x903)
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#define DPIO_CMDID_DESTROY DPIO_CMD(0x983)
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#define DPIO_CMDID_GET_API_VERSION DPIO_CMD(0xa03)
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#define DPIO_CMDID_ENABLE DPIO_CMD(0x002)
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#define DPIO_CMDID_DISABLE DPIO_CMD(0x003)
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#define DPIO_CMDID_GET_ATTR DPIO_CMD(0x004)
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#define DPIO_CMDID_RESET DPIO_CMD(0x005)
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#define DPIO_CMDID_IS_ENABLED DPIO_CMD(0x006)
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#define DPIO_CMDID_SET_IRQ_ENABLE DPIO_CMD(0x012)
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#define DPIO_CMDID_GET_IRQ_ENABLE DPIO_CMD(0x013)
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#define DPIO_CMDID_SET_IRQ_MASK DPIO_CMD(0x014)
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#define DPIO_CMDID_GET_IRQ_MASK DPIO_CMD(0x015)
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#define DPIO_CMDID_GET_IRQ_STATUS DPIO_CMD(0x016)
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#define DPIO_CMDID_CLEAR_IRQ_STATUS DPIO_CMD(0x017)
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#define DPIO_CMDID_SET_STASHING_DEST DPIO_CMD(0x120)
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#define DPIO_CMDID_GET_STASHING_DEST DPIO_CMD(0x121)
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#define DPIO_CMDID_ADD_STATIC_DEQUEUE_CHANNEL DPIO_CMD(0x122)
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#define DPIO_CMDID_REMOVE_STATIC_DEQUEUE_CHANNEL DPIO_CMD(0x123)
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/* Macros for accessing command fields smaller than 1byte */
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#define DPIO_MASK(field) \
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GENMASK(DPIO_##field##_SHIFT + DPIO_##field##_SIZE - 1, \
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DPIO_##field##_SHIFT)
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#define dpio_set_field(var, field, val) \
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((var) |= (((val) << DPIO_##field##_SHIFT) & DPIO_MASK(field)))
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#define dpio_get_field(var, field) \
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(((var) & DPIO_MASK(field)) >> DPIO_##field##_SHIFT)
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#pragma pack(push, 1)
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struct dpio_cmd_open {
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uint32_t dpio_id;
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};
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#define DPIO_CHANNEL_MODE_SHIFT 0
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#define DPIO_CHANNEL_MODE_SIZE 2
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struct dpio_cmd_create {
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uint16_t pad1;
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/* from LSB: channel_mode:2 */
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uint8_t channel_mode;
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uint8_t pad2;
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uint8_t num_priorities;
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};
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struct dpio_cmd_destroy {
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uint32_t dpio_id;
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};
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#define DPIO_ENABLE_SHIFT 0
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#define DPIO_ENABLE_SIZE 1
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struct dpio_rsp_is_enabled {
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/* only the LSB */
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uint8_t en;
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};
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#define DPIO_ATTR_CHANNEL_MODE_SHIFT 0
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#define DPIO_ATTR_CHANNEL_MODE_SIZE 4
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struct dpio_rsp_get_attr {
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uint32_t id;
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uint16_t qbman_portal_id;
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uint8_t num_priorities;
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/* from LSB: channel_mode:4 */
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uint8_t channel_mode;
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uint64_t qbman_portal_ce_offset;
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uint64_t qbman_portal_ci_offset;
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uint32_t qbman_version;
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uint32_t pad;
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uint32_t clk;
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};
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struct dpio_stashing_dest {
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uint8_t sdest;
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};
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struct dpio_cmd_static_dequeue_channel {
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uint32_t dpcon_id;
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};
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struct dpio_rsp_add_static_dequeue_channel {
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uint8_t channel_index;
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};
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struct dpio_rsp_get_api_version {
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uint16_t major;
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uint16_t minor;
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};
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#pragma pack(pop)
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#endif /* _FSL_DPIO_CMD_H */
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