mirror of https://github.com/F-Stack/f-stack.git
173 lines
5.5 KiB
C
173 lines
5.5 KiB
C
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2019 Emmanuel Vadot <manu@freebsd.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <dev/fdt/simplebus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/extres/clk/clk_div.h>
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#include <dev/extres/clk/clk_fixed.h>
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#include <dev/extres/clk/clk_mux.h>
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#include <arm/allwinner/clkng/aw_ccung.h>
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#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
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#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
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/* Non-exported clocks */
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#define CLK_R_AHB 1
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#define CLK_R_APB2 3
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static struct aw_ccung_reset ccu_sun50i_h6_r_resets[] = {
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CCU_RESET(RST_R_APB1_TIMER, 0x11c, 16)
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CCU_RESET(RST_R_APB1_TWD, 0x12c, 16)
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CCU_RESET(RST_R_APB1_PWM, 0x13c, 16)
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CCU_RESET(RST_R_APB2_UART, 0x18c, 16)
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CCU_RESET(RST_R_APB2_I2C, 0x19c, 16)
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CCU_RESET(RST_R_APB1_IR, 0x1cc, 16)
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CCU_RESET(RST_R_APB1_W1, 0x1ec, 16)
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};
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static struct aw_ccung_gate ccu_sun50i_h6_r_gates[] = {
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CCU_GATE(CLK_R_APB1_TIMER, "r_apb1-timer", "r_apb1", 0x11c, 0)
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CCU_GATE(CLK_R_APB1_TWD, "r_apb1-twd", "r_apb1", 0x12c, 0)
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CCU_GATE(CLK_R_APB1_PWM, "r_apb1-pwm", "r_apb1", 0x13c, 0)
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CCU_GATE(CLK_R_APB2_UART, "r_apb1-uart", "r_apb2", 0x18c, 0)
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CCU_GATE(CLK_R_APB2_I2C, "r_apb1-i2c", "r_apb2", 0x19c, 0)
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CCU_GATE(CLK_R_APB1_IR, "r_apb1-ir", "r_apb1", 0x1cc, 0)
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CCU_GATE(CLK_R_APB1_W1, "r_apb1-w1", "r_apb1", 0x1ec, 0)
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};
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static const char *ar100_parents[] = {"osc24M", "osc32k", "pll_periph0", "iosc"};
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PREDIV_CLK(ar100_clk, CLK_AR100, /* id */
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"ar100", ar100_parents, /* name, parents */
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0x00, /* offset */
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16, 2, /* mux */
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4, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* div */
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8, 5, 0, AW_CLK_FACTOR_HAS_COND, /* prediv */
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16, 2, 2); /* prediv condition */
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static const char *r_ahb_parents[] = {"ar100"};
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FIXED_CLK(r_ahb_clk,
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CLK_R_AHB, /* id */
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"r_ahb", /* name */
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r_ahb_parents, /* parent */
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0, /* freq */
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1, /* mult */
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1, /* div */
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0); /* flags */
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static const char *r_apb1_parents[] = {"r_ahb"};
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DIV_CLK(r_apb1_clk,
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CLK_R_APB1, /* id */
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"r_apb1", r_apb1_parents, /* name, parents */
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0x0c, /* offset */
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0, 2, /* shift, width */
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0, NULL); /* flags, div table */
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static const char *r_apb2_parents[] = {"osc24M", "osc32k", "pll_periph0", "iosc"};
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PREDIV_CLK(r_apb2_clk, CLK_R_APB2, /* id */
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"r_apb2", r_apb2_parents, /* name, parents */
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0x10, /* offset */
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16, 2, /* mux */
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4, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* div */
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8, 5, 0, AW_CLK_FACTOR_HAS_COND, /* prediv */
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16, 2, 2); /* prediv condition */
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static struct aw_ccung_clk clks[] = {
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{ .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &ar100_clk},
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{ .type = AW_CLK_FIXED, .clk.fixed = &r_ahb_clk},
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{ .type = AW_CLK_DIV, .clk.div = &r_apb1_clk},
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{ .type = AW_CLK_PREDIV_MUX, .clk.prediv_mux = &r_apb2_clk},
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};
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static struct ofw_compat_data compat_data[] = {
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{ "allwinner,sun50i-h6-r-ccu", 1 },
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{ NULL, 0},
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};
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static int
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ccu_sun50i_h6_r_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Allwinner SUN50I_H6_R Clock Control Unit NG");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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ccu_sun50i_h6_r_attach(device_t dev)
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{
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struct aw_ccung_softc *sc;
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sc = device_get_softc(dev);
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sc->resets = ccu_sun50i_h6_r_resets;
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sc->nresets = nitems(ccu_sun50i_h6_r_resets);
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sc->gates = ccu_sun50i_h6_r_gates;
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sc->ngates = nitems(ccu_sun50i_h6_r_gates);
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sc->clks = clks;
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sc->nclks = nitems(clks);
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return (aw_ccung_attach(dev));
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}
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static device_method_t ccu_sun50i_h6_r_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ccu_sun50i_h6_r_probe),
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DEVMETHOD(device_attach, ccu_sun50i_h6_r_attach),
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DEVMETHOD_END
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};
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static devclass_t ccu_sun50i_h6_r_devclass;
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DEFINE_CLASS_1(ccu_sun50i_h6_r, ccu_sun50i_h6_r_driver, ccu_sun50i_h6_r_methods,
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sizeof(struct aw_ccung_softc), aw_ccung_driver);
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EARLY_DRIVER_MODULE(ccu_sun50i_h6_r, simplebus, ccu_sun50i_h6_r_driver,
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ccu_sun50i_h6_r_devclass, 0, 0, BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
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