2022-09-06 04:00:10 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2021 Marvell.
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*/
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#ifndef _ROC_DPI_PRIV_H_
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#define _ROC_DPI_PRIV_H_
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#define DPI_MAX_VFS 8
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/* DPI PF DBDF information macros */
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#define DPI_PF_DBDF_DEVICE 0
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#define DPI_PF_DBDF_FUNCTION 0
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#define DPI_QUEUE_OPEN 0x1
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#define DPI_QUEUE_CLOSE 0x2
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#define DPI_REG_DUMP 0x3
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#define DPI_GET_REG_CFG 0x4
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#define DPI_CMD_QUEUE_SIZE 4096
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#define DPI_CMD_QUEUE_BUFS 1024
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typedef union dpi_mbox_msg_t {
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uint64_t u[2];
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struct dpi_mbox_message_s {
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/* VF ID to configure */
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2023-09-13 12:21:49 +00:00
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uint64_t vfid : 8;
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2022-09-06 04:00:10 +00:00
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/* Command code */
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uint64_t cmd : 4;
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/* Command buffer size in 8-byte words */
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uint64_t csize : 14;
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/* aura of the command buffer */
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uint64_t aura : 20;
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/* SSO PF function */
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uint64_t sso_pf_func : 16;
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/* NPA PF function */
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uint64_t npa_pf_func : 16;
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} s;
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} dpi_mbox_msg_t;
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#endif
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