2018-12-06 14:17:51 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2015 Intel Corporation
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2017-04-21 10:43:26 +00:00
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*/
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#ifndef _VIRTIO_RXTX_H_
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#define _VIRTIO_RXTX_H_
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#define RTE_PMD_VIRTIO_RX_MAX_BURST 64
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struct virtnet_stats {
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uint64_t packets;
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uint64_t bytes;
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uint64_t errors;
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uint64_t multicast;
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uint64_t broadcast;
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/* Size bins in array as RFC 2819, undersized [0], 64 [1], etc */
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uint64_t size_bins[8];
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};
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struct virtnet_rx {
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struct virtqueue *vq;
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/* dummy mbuf, for wraparound when processing RX ring. */
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struct rte_mbuf fake_mbuf;
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uint64_t mbuf_initializer; /**< value to init mbufs. */
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struct rte_mempool *mpool; /**< mempool for mbuf allocation */
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uint16_t queue_id; /**< DPDK queue index. */
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2018-05-15 09:49:22 +00:00
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uint16_t port_id; /**< Device port identifier. */
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2017-04-21 10:43:26 +00:00
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/* Statistics */
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struct virtnet_stats stats;
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const struct rte_memzone *mz; /**< mem zone to populate RX ring. */
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};
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struct virtnet_tx {
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struct virtqueue *vq;
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/**< memzone to populate hdr. */
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const struct rte_memzone *virtio_net_hdr_mz;
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2018-05-15 09:49:22 +00:00
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rte_iova_t virtio_net_hdr_mem; /**< hdr for each xmit packet */
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2017-04-21 10:43:26 +00:00
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uint16_t queue_id; /**< DPDK queue index. */
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2018-05-15 09:49:22 +00:00
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uint16_t port_id; /**< Device port identifier. */
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2017-04-21 10:43:26 +00:00
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/* Statistics */
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struct virtnet_stats stats;
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const struct rte_memzone *mz; /**< mem zone to populate TX ring. */
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};
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struct virtnet_ctl {
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struct virtqueue *vq;
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/**< memzone to populate hdr. */
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const struct rte_memzone *virtio_net_hdr_mz;
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2018-05-15 09:49:22 +00:00
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rte_iova_t virtio_net_hdr_mem; /**< hdr for each xmit packet */
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uint16_t port_id; /**< Device port identifier. */
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const struct rte_memzone *mz; /**< mem zone to populate CTL ring. */
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2018-12-06 14:17:51 +00:00
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rte_spinlock_t lock; /**< spinlock for control queue. */
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2017-04-21 10:43:26 +00:00
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};
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int virtio_rxq_vec_setup(struct virtnet_rx *rxvq);
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#endif /* _VIRTIO_RXTX_H_ */
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