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gps/GPSResources/tcpmp 0.73/flac/Pocket PC 2003 (ARMV4)/Release/lpc.asm

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2019-05-01 12:32:35 +00:00
; Listing generated by Microsoft (R) Optimizing Compiler Version 14.00.50727
TTL d:\MyProject\VS2005\Tcpmp\tcpmp\flac\flac\src\libFLAC\lpc.c
CODE32
AREA |.drectve|, DRECTVE
DCB "-defaultlib:LIBCMT "
DCB "-defaultlib:OLDNAMES "
EXPORT |FLAC__lpc_compute_autocorrelation|
IMPORT |__imp___muls|
IMPORT |__imp___adds|
AREA |.pdata|, PDATA
|$T1692| DCD |$LN20@FLAC__lpc_|
DCD 0x40009404
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|FLAC__lpc_compute_autocorrelation| PROC
; File d:\myproject\vs2005\tcpmp\tcpmp\flac\flac\src\libflac\lpc.c
; Line 49
|$LN20@FLAC__lpc_|
mov r12, sp
stmdb sp!, {r0 - r3}
stmdb sp!, {r4, r12, lr}
sub sp, sp, #0x10
|$M1689|
; Line 71
ldr r2, [sp, #0x20]
ldr r3, [sp, #0x24]
sub r3, r2, r3
str r3, [sp, #8]
; Line 76
mov r3, #0
str r3, [sp, #4]
b |$LN15@FLAC__lpc_|
|$LN14@FLAC__lpc_|
ldr r3, [sp, #4]
add r3, r3, #1
str r3, [sp, #4]
|$LN15@FLAC__lpc_|
ldr r2, [sp, #4]
ldr r3, [sp, #0x24]
cmp r2, r3
bcs |$LN13@FLAC__lpc_|
; Line 77
ldr r1, [sp, #4]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x28]
add r2, r3, r2
mov r3, #0
str r3, [r2]
b |$LN14@FLAC__lpc_|
|$LN13@FLAC__lpc_|
; Line 78
mov r3, #0
str r3, [sp]
b |$LN12@FLAC__lpc_|
|$LN11@FLAC__lpc_|
ldr r3, [sp]
add r3, r3, #1
str r3, [sp]
|$LN12@FLAC__lpc_|
ldr r2, [sp]
ldr r3, [sp, #8]
cmp r2, r3
bhi |$LN10@FLAC__lpc_|
; Line 79
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x1C]
add r3, r3, r2
ldr r3, [r3]
str r3, [sp, #0xC]
; Line 80
mov r3, #0
str r3, [sp, #4]
b |$LN9@FLAC__lpc_|
|$LN8@FLAC__lpc_|
ldr r3, [sp, #4]
add r3, r3, #1
str r3, [sp, #4]
|$LN9@FLAC__lpc_|
ldr r2, [sp, #4]
ldr r3, [sp, #0x24]
cmp r2, r3
bcs |$LN7@FLAC__lpc_|
; Line 81
ldr r1, [sp, #4]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x28]
add r4, r3, r2
ldr r2, [sp]
ldr r3, [sp, #4]
add r1, r2, r3
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x1C]
add r3, r3, r2
ldr r0, [sp, #0xC]
ldr r1, [r3]
ldr r3, [pc, #0x138]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r1, r0
ldr r0, [r4]
ldr r3, [pc, #0x11C]
ldr r3, [r3]
mov lr, pc
mov pc, r3
ldr r1, [sp, #4]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x28]
add r3, r3, r2
str r0, [r3]
b |$LN8@FLAC__lpc_|
|$LN7@FLAC__lpc_|
; Line 82
b |$LN11@FLAC__lpc_|
|$LN10@FLAC__lpc_|
; Line 83
b |$LN6@FLAC__lpc_|
|$LN5@FLAC__lpc_|
ldr r3, [sp]
add r3, r3, #1
str r3, [sp]
|$LN6@FLAC__lpc_|
ldr r2, [sp]
ldr r3, [sp, #0x20]
cmp r2, r3
bcs |$LN4@FLAC__lpc_|
; Line 84
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x1C]
add r3, r3, r2
ldr r3, [r3]
str r3, [sp, #0xC]
; Line 85
mov r3, #0
str r3, [sp, #4]
b |$LN3@FLAC__lpc_|
|$LN2@FLAC__lpc_|
ldr r3, [sp, #4]
add r3, r3, #1
str r3, [sp, #4]
|$LN3@FLAC__lpc_|
ldr r2, [sp, #0x20]
ldr r3, [sp]
sub r2, r2, r3
ldr r3, [sp, #4]
cmp r3, r2
bcs |$LN1@FLAC__lpc_|
; Line 86
ldr r1, [sp, #4]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x28]
add r4, r3, r2
ldr r2, [sp]
ldr r3, [sp, #4]
add r1, r2, r3
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x1C]
add r3, r3, r2
ldr r0, [sp, #0xC]
ldr r1, [r3]
ldr r3, [pc, #0x4C]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r1, r0
ldr r0, [r4]
ldr r3, [pc, #0x30]
ldr r3, [r3]
mov lr, pc
mov pc, r3
ldr r1, [sp, #4]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x28]
add r3, r3, r2
str r0, [r3]
b |$LN2@FLAC__lpc_|
|$LN1@FLAC__lpc_|
; Line 87
b |$LN5@FLAC__lpc_|
|$LN4@FLAC__lpc_|
; Line 88
add sp, sp, #0x10
ldmia sp, {r4, sp, pc}
|$LN21@FLAC__lpc_|
DCD |__imp___adds|
DCD |__imp___muls|
|$M1690|
ENDP ; |FLAC__lpc_compute_autocorrelation|
EXPORT |FLAC__lpc_compute_lp_coefficients|
IMPORT |__imp___negs|
IMPORT |__imp___stod|
IMPORT |__imp___divd|
IMPORT |__imp___addd|
IMPORT |__imp___subd|
IMPORT |__imp___muld|
IMPORT |__imp___negd|
IMPORT |__imp___dtos|
AREA |.pdata|, PDATA
|$T1724| DCD |$LN18@FLAC__lpc_@2|
DCD 0x40017404
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|FLAC__lpc_compute_lp_coefficients| PROC
; Line 91
|$LN18@FLAC__lpc_@2|
mov r12, sp
stmdb sp!, {r0 - r3}
stmdb sp!, {r4, r5, r12, lr}
sub sp, sp, #0x96, 30
|$M1721|
; Line 99
ldr r3, [sp, #0x268]
ldr r0, [r3]
ldr r3, [pc, #0x5A8]
ldr r3, [r3]
mov lr, pc
mov pc, r3
str r0, [sp, #0x204]
str r1, [sp, #0x208]
; Line 101
mov r3, #0
str r3, [sp]
b |$LN13@FLAC__lpc_@2|
|$LN12@FLAC__lpc_@2|
ldr r3, [sp]
add r3, r3, #1
str r3, [sp]
|$LN13@FLAC__lpc_@2|
ldr r2, [sp]
ldr r3, [sp, #0x26C]
cmp r2, r3
bcs |$LN11@FLAC__lpc_@2|
; Line 103
ldr r3, [sp]
add r1, r3, #1
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x268]
add r3, r3, r2
ldr r0, [r3]
ldr r3, [pc, #0x550]
ldr r3, [r3]
mov lr, pc
mov pc, r3
ldr r3, [pc, #0x53C]
ldr r3, [r3]
mov lr, pc
mov pc, r3
str r0, [sp, #0x20C]
str r1, [sp, #0x210]
; Line 104
mov r3, #0
str r3, [sp, #0x214]
b |$LN10@FLAC__lpc_@2|
|$LN9@FLAC__lpc_@2|
ldr r3, [sp, #0x214]
add r3, r3, #1
str r3, [sp, #0x214]
|$LN10@FLAC__lpc_@2|
ldr r2, [sp, #0x214]
ldr r3, [sp]
cmp r2, r3
bcs |$LN8@FLAC__lpc_@2|
; Line 105
ldr r1, [sp, #0x214]
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r4, r3, r2
ldr r2, [sp]
ldr r3, [sp, #0x214]
sub r1, r2, r3
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x268]
add r3, r3, r2
ldr r0, [r3]
ldr r3, [pc, #0x4C8]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov lr, r1
mov r2, r0
str r4, [sp, #0x220]
ldr r3, [sp, #0x220]
ldr r0, [r3]
ldr r3, [sp, #0x220]
ldr r1, [r3, #4]
mov r3, lr
ldr lr, [pc, #0x488]
ldr r4, [lr]
mov lr, pc
mov pc, r4
mov r3, r1
mov r2, r0
ldr r0, [sp, #0x20C]
ldr r1, [sp, #0x210]
ldr lr, [pc, #0x46C]
ldr r4, [lr]
mov lr, pc
mov pc, r4
str r0, [sp, #0x20C]
str r1, [sp, #0x210]
b |$LN9@FLAC__lpc_@2|
|$LN8@FLAC__lpc_@2|
; Line 106
ldr r0, [sp, #0x20C]
ldr r1, [sp, #0x210]
ldr r2, [sp, #0x204]
ldr r3, [sp, #0x208]
ldr lr, [pc, #0x448]
ldr r4, [lr]
mov lr, pc
mov pc, r4
str r0, [sp, #0x20C]
str r1, [sp, #0x210]
ldr lr, [sp, #0x20C]
ldr r0, [sp, #0x210]
ldr r1, [sp]
mov r3, #8
mul r2, r1, r3
add r3, sp, #4
add r3, r3, r2
str r3, [sp, #0x224]
ldr r3, [sp, #0x224]
str lr, [r3]
ldr r3, [sp, #0x224]
str r0, [r3, #4]
; Line 109
ldr r1, [sp]
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r3, r3, r2
str r3, [sp, #0x228]
ldr r2, [sp, #0x20C]
ldr r3, [sp, #0x228]
str r2, [r3]
ldr r2, [sp, #0x210]
ldr r3, [sp, #0x228]
str r2, [r3, #4]
; Line 110
mov r3, #0
str r3, [sp, #0x214]
b |$LN7@FLAC__lpc_@2|
|$LN6@FLAC__lpc_@2|
ldr r3, [sp, #0x214]
add r3, r3, #1
str r3, [sp, #0x214]
|$LN7@FLAC__lpc_@2|
ldr r3, [sp]
mov r2, r3, lsr #1
ldr r3, [sp, #0x214]
cmp r3, r2
bcs |$LN5@FLAC__lpc_@2|
; Line 111
ldr r1, [sp, #0x214]
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r3, r3, r2
str r3, [sp, #0x22C]
ldr r3, [sp, #0x22C]
ldr r3, [r3]
str r3, [sp, #0x218]
ldr r3, [sp, #0x22C]
ldr r3, [r3, #4]
str r3, [sp, #0x21C]
; Line 112
ldr r1, [sp, #0x214]
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r5, r3, r2
ldr r3, [sp]
sub r2, r3, #1
ldr r3, [sp, #0x214]
sub r1, r2, r3
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r3, r3, r2
ldr r0, [sp, #0x20C]
ldr r1, [sp, #0x210]
str r3, [sp, #0x230]
ldr r3, [sp, #0x230]
ldr r2, [r3]
ldr r3, [sp, #0x230]
ldr r3, [r3, #4]
ldr lr, [pc, #0x318]
ldr r4, [lr]
mov lr, pc
mov pc, r4
mov lr, r1
mov r2, r0
str r5, [sp, #0x234]
ldr r3, [sp, #0x234]
ldr r0, [r3]
ldr r3, [sp, #0x234]
ldr r1, [r3, #4]
mov r3, lr
ldr lr, [pc, #0x2F0]
ldr r4, [lr]
mov lr, pc
mov pc, r4
mov lr, r1
ldr r1, [sp, #0x214]
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r3, r3, r2
str r3, [sp, #0x238]
ldr r3, [sp, #0x238]
str r0, [r3]
ldr r3, [sp, #0x238]
str lr, [r3, #4]
; Line 113
ldr r3, [sp]
sub r2, r3, #1
ldr r3, [sp, #0x214]
sub r1, r2, r3
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r5, r3, r2
ldr r0, [sp, #0x20C]
ldr r1, [sp, #0x210]
ldr r2, [sp, #0x218]
ldr r3, [sp, #0x21C]
ldr lr, [pc, #0x27C]
ldr r4, [lr]
mov lr, pc
mov pc, r4
mov lr, r1
mov r2, r0
str r5, [sp, #0x23C]
ldr r3, [sp, #0x23C]
ldr r0, [r3]
ldr r3, [sp, #0x23C]
ldr r1, [r3, #4]
mov r3, lr
ldr lr, [pc, #0x254]
ldr r4, [lr]
mov lr, pc
mov pc, r4
mov lr, r1
ldr r3, [sp]
sub r2, r3, #1
ldr r3, [sp, #0x214]
sub r1, r2, r3
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r3, r3, r2
str r3, [sp, #0x240]
ldr r3, [sp, #0x240]
str r0, [r3]
ldr r3, [sp, #0x240]
str lr, [r3, #4]
; Line 114
b |$LN6@FLAC__lpc_@2|
|$LN5@FLAC__lpc_@2|
; Line 115
ldr r3, [sp]
tst r3, #1
beq |$LN4@FLAC__lpc_@2|
; Line 116
ldr r1, [sp, #0x214]
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r5, r3, r2
ldr r1, [sp, #0x214]
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r3, r3, r2
str r3, [sp, #0x244]
ldr r3, [sp, #0x244]
ldr r0, [r3]
ldr r3, [sp, #0x244]
ldr r1, [r3, #4]
ldr r2, [sp, #0x20C]
ldr r3, [sp, #0x210]
ldr lr, [pc, #0x1B0]
ldr r4, [lr]
mov lr, pc
mov pc, r4
mov lr, r1
mov r2, r0
str r5, [sp, #0x248]
ldr r3, [sp, #0x248]
ldr r0, [r3]
ldr r3, [sp, #0x248]
ldr r1, [r3, #4]
mov r3, lr
ldr lr, [pc, #0x188]
ldr r4, [lr]
mov lr, pc
mov pc, r4
mov lr, r1
ldr r1, [sp, #0x214]
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r3, r3, r2
str r3, [sp, #0x24C]
ldr r3, [sp, #0x24C]
str r0, [r3]
ldr r3, [sp, #0x24C]
str lr, [r3, #4]
|$LN4@FLAC__lpc_@2|
; Line 118
ldr r0, [sp, #0x20C]
ldr r1, [sp, #0x210]
ldr r2, [sp, #0x20C]
ldr r3, [sp, #0x210]
ldr lr, [pc, #0x134]
ldr r4, [lr]
mov lr, pc
mov pc, r4
mov r3, r1
mov r2, r0
mov r0, #0
mov r1, #0xFF, 10
orr r1, r1, #3, 12
ldr lr, [pc, #0x114]
ldr r4, [lr]
mov lr, pc
mov pc, r4
mov r3, r1
mov r2, r0
ldr r0, [sp, #0x204]
ldr r1, [sp, #0x208]
ldr lr, [pc, #0xF0]
ldr r4, [lr]
mov lr, pc
mov pc, r4
str r0, [sp, #0x204]
str r1, [sp, #0x208]
; Line 121
mov r3, #0
str r3, [sp, #0x214]
b |$LN3@FLAC__lpc_@2|
|$LN2@FLAC__lpc_@2|
ldr r3, [sp, #0x214]
add r3, r3, #1
str r3, [sp, #0x214]
|$LN3@FLAC__lpc_@2|
ldr r2, [sp, #0x214]
ldr r3, [sp]
cmp r2, r3
bhi |$LN1@FLAC__lpc_@2|
; Line 122
ldr r1, [sp, #0x214]
mov r3, #8
mul r2, r1, r3
add r3, sp, #0x41, 30
add r3, r3, r2
str r3, [sp, #0x250]
ldr r3, [sp, #0x250]
ldr r0, [r3]
ldr r3, [sp, #0x250]
ldr r1, [r3, #4]
ldr r3, [pc, #0x84]
ldr r3, [r3]
mov lr, pc
mov pc, r3
ldr r3, [pc, #0x70]
ldr r3, [r3]
mov lr, pc
mov pc, r3
ldr r1, [sp]
mov r3, #0x80
mul r2, r1, r3
ldr r3, [sp, #0x270]
add r1, r3, r2
ldr r2, [sp, #0x214]
mov r3, #4
mul r3, r2, r3
add r3, r1, r3
str r0, [r3]
b |$LN2@FLAC__lpc_@2|
|$LN1@FLAC__lpc_@2|
; Line 123
ldr r1, [sp]
mov r3, #8
mul r2, r1, r3
ldr r3, [sp, #0x274]
add r3, r3, r2
str r3, [sp, #0x254]
ldr r2, [sp, #0x204]
ldr r3, [sp, #0x254]
str r2, [r3]
ldr r2, [sp, #0x208]
ldr r3, [sp, #0x254]
str r2, [r3, #4]
; Line 124
b |$LN12@FLAC__lpc_@2|
|$LN11@FLAC__lpc_@2|
; Line 125
add sp, sp, #0x96, 30
ldmia sp, {r4, r5, sp, pc}
|$LN19@FLAC__lpc_@2|
DCD |__imp___dtos|
DCD |__imp___negd|
DCD |__imp___muld|
DCD |__imp___subd|
DCD |__imp___addd|
DCD |__imp___divd|
DCD |__imp___stod|
DCD |__imp___negs|
|$M1722|
ENDP ; |FLAC__lpc_compute_lp_coefficients|
EXPORT |FLAC__lpc_quantize_coefficients|
IMPORT |floor|
IMPORT |frexp|
IMPORT |fabs|
IMPORT |FLAC__SUBFRAME_LPC_QLP_SHIFT_LEN|
IMPORT |__imp___eqd|
IMPORT |__imp___gtd|
IMPORT |__imp___led|
IMPORT |__imp___itod|
IMPORT |__imp___dtoi|
AREA |.pdata|, PDATA
|$T1752| DCD |$LN27@FLAC__lpc_@3|
DCD 0x40014304
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|FLAC__lpc_quantize_coefficients| PROC
; Line 128
|$LN27@FLAC__lpc_@3|
mov r12, sp
stmdb sp!, {r0 - r3}
stmdb sp!, {r4, r5, r12, lr}
sub sp, sp, #0x48
|$M1749|
; Line 130
ldr r3, [pc, #0x4F0]
str r3, [sp, #8]
ldr r3, [pc, #0x4E4]
str r3, [sp, #0xC]
; Line 132
ldr r3, [pc, #0x4D8]
ldr r3, [r3]
sub r2, r3, #1
mov r3, #1
mov r3, r3, lsl r2
sub r3, r3, #1
str r3, [sp, #0x18]
; Line 133
ldr r3, [sp, #0x18]
rsb r3, r3, #0
sub r3, r3, #1
str r3, [sp, #0x14]
; Line 139
ldr r3, [sp, #0x60]
sub r3, r3, #1
str r3, [sp, #0x60]
; Line 140
ldr r2, [sp, #0x60]
mov r3, #1
mov r3, r3, lsl r2
str r3, [sp, #0x10]
; Line 141
ldr r3, [sp, #0x10]
rsb r3, r3, #0
str r3, [sp, #4]
; Line 142
ldr r3, [sp, #0x10]
sub r3, r3, #1
str r3, [sp, #0x10]
; Line 144
mov r3, #0
str r3, [sp]
b |$LN21@FLAC__lpc_@3|
|$LN20@FLAC__lpc_@3|
ldr r3, [sp]
add r3, r3, #1
str r3, [sp]
|$LN21@FLAC__lpc_@3|
ldr r2, [sp]
ldr r3, [sp, #0x5C]
cmp r2, r3
bcs |$LN19@FLAC__lpc_@3|
; Line 145
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x58]
add r3, r3, r2
ldr r0, [r3]
ldr r3, [pc, #0x428]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r2, #0
mov r3, #0
ldr lr, [pc, #0x41C]
ldr r4, [lr]
mov lr, pc
mov pc, r4
cmp r0, #0
beq |$LN18@FLAC__lpc_@3|
; Line 146
b |$LN20@FLAC__lpc_@3|
|$LN18@FLAC__lpc_@3|
; Line 147
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x58]
add r3, r3, r2
ldr r0, [r3]
ldr r3, [pc, #0x3DC]
ldr r3, [r3]
mov lr, pc
mov pc, r3
bl fabs
str r1, [sp, #0x34]
str r0, [sp, #0x30]
ldr r3, [sp, #0x30]
str r3, [sp, #0x1C]
ldr r3, [sp, #0x34]
str r3, [sp, #0x20]
; Line 148
ldr r0, [sp, #0x1C]
ldr r1, [sp, #0x20]
ldr r2, [sp, #8]
ldr r3, [sp, #0xC]
ldr lr, [pc, #0x3A8]
ldr r4, [lr]
mov lr, pc
mov pc, r4
cmp r0, #0
beq |$LN17@FLAC__lpc_@3|
; Line 149
ldr r3, [sp, #0x1C]
str r3, [sp, #8]
ldr r3, [sp, #0x20]
str r3, [sp, #0xC]
|$LN17@FLAC__lpc_@3|
; Line 150
b |$LN20@FLAC__lpc_@3|
|$LN19@FLAC__lpc_@3|
|$LN24@FLAC__lpc_@3|
|$redo_it$1513|
; Line 152
ldr r0, [sp, #8]
ldr r1, [sp, #0xC]
mov r2, #0
mov r3, #0
ldr lr, [pc, #0x368]
ldr r4, [lr]
mov lr, pc
mov pc, r4
cmp r0, #0
beq |$LN16@FLAC__lpc_@3|
; Line 154
mov r3, #2
str r3, [sp, #0x2C]
b |$LN22@FLAC__lpc_@3|
; Line 156
b |$LN15@FLAC__lpc_@3|
|$LN16@FLAC__lpc_@3|
; Line 159
add r2, sp, #0x24
ldr r0, [sp, #8]
ldr r1, [sp, #0xC]
bl frexp
; Line 160
ldr r3, [sp, #0x24]
sub r3, r3, #1
str r3, [sp, #0x24]
; Line 161
ldr r2, [sp, #0x60]
ldr r3, [sp, #0x24]
sub r3, r2, r3
sub r2, r3, #1
ldr r3, [sp, #0x68]
str r2, [r3]
; Line 163
ldr r3, [sp, #0x68]
ldr r2, [r3]
ldr r3, [sp, #0x14]
cmp r2, r3
blt |$LN13@FLAC__lpc_@3|
ldr r3, [sp, #0x68]
ldr r2, [r3]
ldr r3, [sp, #0x18]
cmp r2, r3
ble |$LN14@FLAC__lpc_@3|
|$LN13@FLAC__lpc_@3|
; Line 170
mov r3, #1
str r3, [sp, #0x2C]
b |$LN22@FLAC__lpc_@3|
|$LN14@FLAC__lpc_@3|
|$LN15@FLAC__lpc_@3|
; Line 174
ldr r3, [sp, #0x68]
ldr r3, [r3]
cmp r3, #0
blt |$LN12@FLAC__lpc_@3|
; Line 175
mov r3, #0
str r3, [sp]
b |$LN11@FLAC__lpc_@3|
|$LN10@FLAC__lpc_@3|
ldr r3, [sp]
add r3, r3, #1
str r3, [sp]
|$LN11@FLAC__lpc_@3|
ldr r2, [sp]
ldr r3, [sp, #0x5C]
cmp r2, r3
bcs |$LN9@FLAC__lpc_@3|
; Line 176
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x58]
add r3, r3, r2
ldr r0, [r3]
ldr r3, [pc, #0x284]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r5, r1
mov r4, r0
ldr r3, [sp, #0x68]
ldr r2, [r3]
mov r3, #1
mov r0, r3, lsl r2
ldr r3, [pc, #0x258]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r3, r1
mov r2, r0
mov r0, r4
mov r1, r5
ldr lr, [pc, #0x22C]
ldr r4, [lr]
mov lr, pc
mov pc, r4
bl floor
str r1, [sp, #0x3C]
str r0, [sp, #0x38]
ldr r0, [sp, #0x38]
ldr r1, [sp, #0x3C]
ldr r3, [pc, #0x20C]
ldr r3, [r3]
mov lr, pc
mov pc, r3
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x64]
add r3, r3, r2
str r0, [r3]
; Line 179
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x64]
add r3, r3, r2
ldr r2, [r3]
ldr r3, [sp, #0x10]
cmp r2, r3
bgt |$LN7@FLAC__lpc_@3|
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x64]
add r3, r3, r2
ldr r2, [r3]
ldr r3, [sp, #4]
cmp r2, r3
bge |$LN8@FLAC__lpc_@3|
|$LN7@FLAC__lpc_@3|
; Line 183
ldr r0, [sp, #8]
ldr r1, [sp, #0xC]
mov r2, #0
mov r3, #1, 2
ldr lr, [pc, #0x188]
ldr r4, [lr]
mov lr, pc
mov pc, r4
str r0, [sp, #8]
str r1, [sp, #0xC]
; Line 184
b |$redo_it$1513|
|$LN8@FLAC__lpc_@3|
; Line 186
b |$LN10@FLAC__lpc_@3|
|$LN9@FLAC__lpc_@3|
; Line 188
b |$LN6@FLAC__lpc_@3|
|$LN12@FLAC__lpc_@3|
; Line 189
ldr r3, [sp, #0x68]
ldr r3, [r3]
rsb r3, r3, #0
str r3, [sp, #0x28]
; Line 193
mov r3, #0
str r3, [sp]
b |$LN5@FLAC__lpc_@3|
|$LN4@FLAC__lpc_@3|
ldr r3, [sp]
add r3, r3, #1
str r3, [sp]
|$LN5@FLAC__lpc_@3|
ldr r2, [sp]
ldr r3, [sp, #0x5C]
cmp r2, r3
bcs |$LN3@FLAC__lpc_@3|
; Line 194
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x58]
add r3, r3, r2
ldr r0, [r3]
ldr r3, [pc, #0x124]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r5, r1
mov r4, r0
ldr r2, [sp, #0x28]
mov r3, #1
mov r0, r3, lsl r2
ldr r3, [pc, #0xFC]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r3, r1
mov r2, r0
mov r0, r4
mov r1, r5
ldr lr, [pc, #0xD8]
ldr r4, [lr]
mov lr, pc
mov pc, r4
bl floor
str r1, [sp, #0x44]
str r0, [sp, #0x40]
ldr r0, [sp, #0x40]
ldr r1, [sp, #0x44]
ldr r3, [pc, #0xB0]
ldr r3, [r3]
mov lr, pc
mov pc, r3
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x64]
add r3, r3, r2
str r0, [r3]
; Line 197
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x64]
add r3, r3, r2
ldr r2, [r3]
ldr r3, [sp, #0x10]
cmp r2, r3
bgt |$LN1@FLAC__lpc_@3|
ldr r1, [sp]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x64]
add r3, r3, r2
ldr r2, [r3]
ldr r3, [sp, #4]
cmp r2, r3
bge |$LN2@FLAC__lpc_@3|
|$LN1@FLAC__lpc_@3|
; Line 201
ldr r0, [sp, #8]
ldr r1, [sp, #0xC]
mov r2, #0
mov r3, #1, 2
ldr lr, [pc, #0x2C]
ldr r4, [lr]
mov lr, pc
mov pc, r4
str r0, [sp, #8]
str r1, [sp, #0xC]
; Line 202
b |$LN24@FLAC__lpc_@3|
|$LN2@FLAC__lpc_@3|
; Line 204
b |$LN4@FLAC__lpc_@3|
|$LN3@FLAC__lpc_@3|
|$LN6@FLAC__lpc_@3|
; Line 207
mov r3, #0
str r3, [sp, #0x2C]
|$LN22@FLAC__lpc_@3|
; Line 208
ldr r0, [sp, #0x2C]
add sp, sp, #0x48
ldmia sp, {r4, r5, sp, pc}
|$LN28@FLAC__lpc_@3|
DCD |__imp___muld|
DCD |__imp___dtoi|
DCD |__imp___divd|
DCD |__imp___itod|
DCD |__imp___stod|
DCD |__imp___led|
DCD |__imp___gtd|
DCD |__imp___eqd|
DCD |FLAC__SUBFRAME_LPC_QLP_SHIFT_LEN|
DCD 0xc693b8b5
DCD 0xb5056e17
|$M1750|
ENDP ; |FLAC__lpc_quantize_coefficients|
EXPORT |FLAC__lpc_compute_residual_from_qlp_coefficients|
AREA |.pdata|, PDATA
|$T1758| DCD |$LN11@FLAC__lpc_@4|
DCD 0x40003d04
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|FLAC__lpc_compute_residual_from_qlp_coefficients| PROC
; Line 211
|$LN11@FLAC__lpc_@4|
mov r12, sp
stmdb sp!, {r0 - r3}
stmdb sp!, {r12, lr}
sub sp, sp, #0x10
|$M1755|
; Line 227
mov r3, #0
str r3, [sp]
b |$LN6@FLAC__lpc_@4|
|$LN5@FLAC__lpc_@4|
ldr r3, [sp]
add r3, r3, #1
str r3, [sp]
|$LN6@FLAC__lpc_@4|
ldr r2, [sp]
ldr r3, [sp, #0x1C]
cmp r2, r3
bcs |$LN4@FLAC__lpc_@4|
; Line 231
mov r3, #0
str r3, [sp, #8]
; Line 232
ldr r3, [sp, #0x18]
str r3, [sp, #4]
; Line 233
mov r3, #0
str r3, [sp, #0xC]
b |$LN3@FLAC__lpc_@4|
|$LN2@FLAC__lpc_@4|
ldr r3, [sp, #0xC]
add r3, r3, #1
str r3, [sp, #0xC]
|$LN3@FLAC__lpc_@4|
ldr r2, [sp, #0xC]
ldr r3, [sp, #0x24]
cmp r2, r3
bcs |$LN1@FLAC__lpc_@4|
; Line 234
ldr r3, [sp, #4]
sub r3, r3, #4
str r3, [sp, #4]
ldr r1, [sp, #0xC]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x20]
add r3, r3, r2
ldr r1, [r3]
ldr r3, [sp, #4]
ldr r3, [r3]
mul r2, r1, r3
ldr r3, [sp, #8]
add r3, r3, r2
str r3, [sp, #8]
; Line 245
b |$LN2@FLAC__lpc_@4|
|$LN1@FLAC__lpc_@4|
; Line 246
ldr r2, [sp, #8]
ldr r3, [sp, #0x28]
mov r2, r2, asr r3
ldr r3, [sp, #0x18]
ldr r3, [r3]
sub r2, r3, r2
ldr r3, [sp, #0x2C]
str r2, [r3]
ldr r3, [sp, #0x2C]
add r3, r3, #4
str r3, [sp, #0x2C]
ldr r3, [sp, #0x18]
add r3, r3, #4
str r3, [sp, #0x18]
; Line 247
b |$LN5@FLAC__lpc_@4|
|$LN4@FLAC__lpc_@4|
; Line 257
add sp, sp, #0x10
ldmia sp, {sp, pc}
|$M1756|
ENDP ; |FLAC__lpc_compute_residual_from_qlp_coefficients|
EXPORT |FLAC__lpc_compute_residual_from_qlp_coefficients_wide|
IMPORT |__imp___rt_srsh|
AREA |.pdata|, PDATA
|$T1765| DCD |$LN11@FLAC__lpc_@5|
DCD 0x40005904
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|FLAC__lpc_compute_residual_from_qlp_coefficients_wide| PROC
; Line 260
|$LN11@FLAC__lpc_@5|
mov r12, sp
stmdb sp!, {r0 - r3}
stmdb sp!, {r12, lr}
sub sp, sp, #0x20
|$M1762|
; Line 273
mov r3, #0
str r3, [sp]
b |$LN6@FLAC__lpc_@5|
|$LN5@FLAC__lpc_@5|
ldr r3, [sp]
add r3, r3, #1
str r3, [sp]
|$LN6@FLAC__lpc_@5|
ldr r2, [sp]
ldr r3, [sp, #0x2C]
cmp r2, r3
bcs |$LN4@FLAC__lpc_@5|
; Line 274
mov r3, #0
str r3, [sp, #8]
mov r3, #0
str r3, [sp, #0xC]
; Line 275
ldr r3, [sp, #0x28]
str r3, [sp, #4]
; Line 276
mov r3, #0
str r3, [sp, #0x10]
b |$LN3@FLAC__lpc_@5|
|$LN2@FLAC__lpc_@5|
ldr r3, [sp, #0x10]
add r3, r3, #1
str r3, [sp, #0x10]
|$LN3@FLAC__lpc_@5|
ldr r2, [sp, #0x10]
ldr r3, [sp, #0x34]
cmp r2, r3
bcs |$LN1@FLAC__lpc_@5|
; Line 277
ldr r3, [sp, #4]
sub r3, r3, #4
str r3, [sp, #4]
ldr r3, [sp, #4]
ldr lr, [r3]
ldr r3, [sp, #4]
ldr r3, [r3]
mov r0, r3, asr #31
ldr r1, [sp, #0x10]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x30]
add r3, r3, r2
ldr r3, [r3]
str r3, [sp, #0x14]
ldr r2, [sp, #0x14]
ldr r3, [sp, #0x14]
mov r1, r3, asr #31
str r2, [sp, #0x18]
str lr, [sp, #0x1C]
ldr r3, [sp, #0x18]
mul r2, r3, r0
ldr r3, [sp, #0x1C]
mul r3, r1, r3
add r1, r2, r3
ldr r2, [sp, #0x18]
ldr r3, [sp, #0x1C]
umull r0, r3, r2, r3
add r1, r1, r3
ldr r2, [sp, #8]
ldr r3, [sp, #0xC]
adds r2, r2, r0
adc r3, r3, r1
str r2, [sp, #8]
str r3, [sp, #0xC]
b |$LN2@FLAC__lpc_@5|
|$LN1@FLAC__lpc_@5|
; Line 288
ldr r0, [sp, #8]
ldr r1, [sp, #0xC]
ldr r2, [sp, #0x38]
ldr r3, [pc, #0x44]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r2, r0
ldr r3, [sp, #0x28]
ldr r3, [r3]
sub r2, r3, r2
ldr r3, [sp, #0x3C]
str r2, [r3]
ldr r3, [sp, #0x3C]
add r3, r3, #4
str r3, [sp, #0x3C]
ldr r3, [sp, #0x28]
add r3, r3, #4
str r3, [sp, #0x28]
; Line 289
b |$LN5@FLAC__lpc_@5|
|$LN4@FLAC__lpc_@5|
; Line 290
add sp, sp, #0x20
ldmia sp, {sp, pc}
|$LN12@FLAC__lpc_@5|
DCD |__imp___rt_srsh|
|$M1763|
ENDP ; |FLAC__lpc_compute_residual_from_qlp_coefficients_wide|
EXPORT |FLAC__lpc_restore_signal|
AREA |.pdata|, PDATA
|$T1771| DCD |$LN11@FLAC__lpc_@6|
DCD 0x40003d04
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|FLAC__lpc_restore_signal| PROC
; Line 295
|$LN11@FLAC__lpc_@6|
mov r12, sp
stmdb sp!, {r0 - r3}
stmdb sp!, {r12, lr}
sub sp, sp, #0x10
|$M1768|
; Line 311
mov r3, #0
str r3, [sp]
b |$LN6@FLAC__lpc_@6|
|$LN5@FLAC__lpc_@6|
ldr r3, [sp]
add r3, r3, #1
str r3, [sp]
|$LN6@FLAC__lpc_@6|
ldr r2, [sp]
ldr r3, [sp, #0x1C]
cmp r2, r3
bcs |$LN4@FLAC__lpc_@6|
; Line 315
mov r3, #0
str r3, [sp, #8]
; Line 316
ldr r3, [sp, #0x2C]
str r3, [sp, #4]
; Line 317
mov r3, #0
str r3, [sp, #0xC]
b |$LN3@FLAC__lpc_@6|
|$LN2@FLAC__lpc_@6|
ldr r3, [sp, #0xC]
add r3, r3, #1
str r3, [sp, #0xC]
|$LN3@FLAC__lpc_@6|
ldr r2, [sp, #0xC]
ldr r3, [sp, #0x24]
cmp r2, r3
bcs |$LN1@FLAC__lpc_@6|
; Line 318
ldr r3, [sp, #4]
sub r3, r3, #4
str r3, [sp, #4]
ldr r1, [sp, #0xC]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x20]
add r3, r3, r2
ldr r1, [r3]
ldr r3, [sp, #4]
ldr r3, [r3]
mul r2, r1, r3
ldr r3, [sp, #8]
add r3, r3, r2
str r3, [sp, #8]
; Line 329
b |$LN2@FLAC__lpc_@6|
|$LN1@FLAC__lpc_@6|
; Line 330
ldr r2, [sp, #8]
ldr r3, [sp, #0x28]
mov r2, r2, asr r3
ldr r3, [sp, #0x18]
ldr r3, [r3]
add r2, r3, r2
ldr r3, [sp, #0x2C]
str r2, [r3]
ldr r3, [sp, #0x2C]
add r3, r3, #4
str r3, [sp, #0x2C]
ldr r3, [sp, #0x18]
add r3, r3, #4
str r3, [sp, #0x18]
; Line 331
b |$LN5@FLAC__lpc_@6|
|$LN4@FLAC__lpc_@6|
; Line 341
add sp, sp, #0x10
ldmia sp, {sp, pc}
|$M1769|
ENDP ; |FLAC__lpc_restore_signal|
EXPORT |FLAC__lpc_restore_signal_wide|
AREA |.pdata|, PDATA
|$T1777| DCD |$LN11@FLAC__lpc_@7|
DCD 0x40005904
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|FLAC__lpc_restore_signal_wide| PROC
; Line 344
|$LN11@FLAC__lpc_@7|
mov r12, sp
stmdb sp!, {r0 - r3}
stmdb sp!, {r12, lr}
sub sp, sp, #0x20
|$M1774|
; Line 357
mov r3, #0
str r3, [sp]
b |$LN6@FLAC__lpc_@7|
|$LN5@FLAC__lpc_@7|
ldr r3, [sp]
add r3, r3, #1
str r3, [sp]
|$LN6@FLAC__lpc_@7|
ldr r2, [sp]
ldr r3, [sp, #0x2C]
cmp r2, r3
bcs |$LN4@FLAC__lpc_@7|
; Line 358
mov r3, #0
str r3, [sp, #8]
mov r3, #0
str r3, [sp, #0xC]
; Line 359
ldr r3, [sp, #0x3C]
str r3, [sp, #4]
; Line 360
mov r3, #0
str r3, [sp, #0x10]
b |$LN3@FLAC__lpc_@7|
|$LN2@FLAC__lpc_@7|
ldr r3, [sp, #0x10]
add r3, r3, #1
str r3, [sp, #0x10]
|$LN3@FLAC__lpc_@7|
ldr r2, [sp, #0x10]
ldr r3, [sp, #0x34]
cmp r2, r3
bcs |$LN1@FLAC__lpc_@7|
; Line 361
ldr r3, [sp, #4]
sub r3, r3, #4
str r3, [sp, #4]
ldr r3, [sp, #4]
ldr lr, [r3]
ldr r3, [sp, #4]
ldr r3, [r3]
mov r0, r3, asr #31
ldr r1, [sp, #0x10]
mov r3, #4
mul r2, r1, r3
ldr r3, [sp, #0x30]
add r3, r3, r2
ldr r3, [r3]
str r3, [sp, #0x14]
ldr r2, [sp, #0x14]
ldr r3, [sp, #0x14]
mov r1, r3, asr #31
str r2, [sp, #0x18]
str lr, [sp, #0x1C]
ldr r3, [sp, #0x18]
mul r2, r3, r0
ldr r3, [sp, #0x1C]
mul r3, r1, r3
add r1, r2, r3
ldr r2, [sp, #0x18]
ldr r3, [sp, #0x1C]
umull r0, r3, r2, r3
add r1, r1, r3
ldr r2, [sp, #8]
ldr r3, [sp, #0xC]
adds r2, r2, r0
adc r3, r3, r1
str r2, [sp, #8]
str r3, [sp, #0xC]
b |$LN2@FLAC__lpc_@7|
|$LN1@FLAC__lpc_@7|
; Line 372
ldr r0, [sp, #8]
ldr r1, [sp, #0xC]
ldr r2, [sp, #0x38]
ldr r3, [pc, #0x44]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r2, r0
ldr r3, [sp, #0x28]
ldr r3, [r3]
add r2, r3, r2
ldr r3, [sp, #0x3C]
str r2, [r3]
ldr r3, [sp, #0x3C]
add r3, r3, #4
str r3, [sp, #0x3C]
ldr r3, [sp, #0x28]
add r3, r3, #4
str r3, [sp, #0x28]
; Line 373
b |$LN5@FLAC__lpc_@7|
|$LN4@FLAC__lpc_@7|
; Line 374
add sp, sp, #0x20
ldmia sp, {sp, pc}
|$LN12@FLAC__lpc_@7|
DCD |__imp___rt_srsh|
|$M1775|
ENDP ; |FLAC__lpc_restore_signal_wide|
EXPORT |FLAC__lpc_compute_expected_bits_per_residual_sample_with_error_scale|
EXPORT |FLAC__lpc_compute_expected_bits_per_residual_sample|
IMPORT |__imp___utod|
AREA |.pdata|, PDATA
|$T1787| DCD |$LN5@FLAC__lpc_@8|
DCD 0x40002604
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|FLAC__lpc_compute_expected_bits_per_residual_sample| PROC
; Line 379
|$LN5@FLAC__lpc_@8|
mov r12, sp
stmdb sp!, {r0 - r2}
stmdb sp!, {r4, r12, lr}
sub sp, sp, #0x18
|$M1784|
; Line 384
ldr r0, [sp, #0x2C]
ldr r3, [pc, #0x78]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r3, r1
mov r2, r0
ldr r0, [pc, #0x5C]
ldr r1, [pc, #0x54]
ldr lr, [pc, #0x4C]
ldr r4, [lr]
mov lr, pc
mov pc, r4
str r0, [sp]
str r1, [sp, #4]
; Line 386
ldr r2, [sp]
ldr r3, [sp, #4]
ldr r0, [sp, #0x24]
ldr r1, [sp, #0x28]
bl FLAC__lpc_compute_expected_bits_per_residual_sample_with_error_scale
str r1, [sp, #0x14]
str r0, [sp, #0x10]
ldr r2, [sp, #0x10]
ldr r3, [sp, #0x14]
str r2, [sp, #8]
; Line 387
str r3, [sp, #0xC]
ldr r0, [sp, #8]
ldr r1, [sp, #0xC]
add sp, sp, #0x18
ldmia sp, {r4, sp, pc}
|$LN6@FLAC__lpc_@8|
DCD |__imp___divd|
DCD 0x3fcebfbd
DCD 0xff82c58e
DCD |__imp___utod|
|$M1785|
ENDP ; |FLAC__lpc_compute_expected_bits_per_residual_sample|
IMPORT |log|
IMPORT |__imp___ged|
IMPORT |__imp___ltd|
AREA |.pdata|, PDATA
|$T1802| DCD |$LN11@FLAC__lpc_@9|
DCD 0x40006104
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|FLAC__lpc_compute_expected_bits_per_residual_sample_with_error_scale| PROC
; Line 390
|$LN11@FLAC__lpc_@9|
mov r12, sp
stmdb sp!, {r0 - r3}
stmdb sp!, {r4, r12, lr}
sub sp, sp, #0x18
|$M1799|
; Line 391
ldr r0, [sp, #0x24]
ldr r1, [sp, #0x28]
mov r2, #0
mov r3, #0
ldr lr, [pc, #0x158]
ldr r4, [lr]
mov lr, pc
mov pc, r4
cmp r0, #0
beq |$LN6@FLAC__lpc_@9|
; Line 392
ldr r0, [sp, #0x2C]
ldr r1, [sp, #0x30]
ldr r2, [sp, #0x24]
ldr r3, [sp, #0x28]
ldr lr, [pc, #0x12C]
ldr r4, [lr]
mov lr, pc
mov pc, r4
bl log
str r1, [sp, #0x14]
str r0, [sp, #0x10]
mov r0, #0
mov r1, #0xFF, 10
orr r1, r1, #2, 12
ldr r2, [sp, #0x10]
ldr r3, [sp, #0x14]
ldr lr, [pc, #0xFC]
ldr r4, [lr]
mov lr, pc
mov pc, r4
ldr r2, [pc, #0xE8]
ldr r3, [pc, #0xE0]
ldr lr, [pc, #0xD8]
ldr r4, [lr]
mov lr, pc
mov pc, r4
str r0, [sp]
str r1, [sp, #4]
; Line 393
ldr r0, [sp]
ldr r1, [sp, #4]
mov r2, #0
mov r3, #0
ldr lr, [pc, #0xAC]
ldr r4, [lr]
mov lr, pc
mov pc, r4
cmp r0, #0
beq |$LN5@FLAC__lpc_@9|
; Line 394
ldr r2, [sp]
ldr r3, [sp, #4]
str r2, [sp, #8]
; Line 404
str r3, [sp, #0xC]
; Line 394
b |$LN7@FLAC__lpc_@9|
; Line 395
b |$LN4@FLAC__lpc_@9|
|$LN5@FLAC__lpc_@9|
; Line 396
mov r3, #0
str r3, [sp, #8]
mov r3, #0
str r3, [sp, #0xC]
b |$LN7@FLAC__lpc_@9|
|$LN4@FLAC__lpc_@9|
; Line 398
b |$LN3@FLAC__lpc_@9|
|$LN6@FLAC__lpc_@9|
ldr r0, [sp, #0x24]
ldr r1, [sp, #0x28]
mov r2, #0
mov r3, #0
ldr lr, [pc, #0x50]
ldr r4, [lr]
mov lr, pc
mov pc, r4
cmp r0, #0
beq |$LN2@FLAC__lpc_@9|
; Line 399
ldr r3, [pc, #0x34]
str r3, [sp, #8]
ldr r3, [pc, #0x28]
str r3, [sp, #0xC]
b |$LN7@FLAC__lpc_@9|
; Line 401
b |$LN1@FLAC__lpc_@9|
|$LN2@FLAC__lpc_@9|
; Line 402
mov r3, #0
str r3, [sp, #8]
mov r3, #0
str r3, [sp, #0xC]
|$LN1@FLAC__lpc_@9|
|$LN3@FLAC__lpc_@9|
|$LN7@FLAC__lpc_@9|
; Line 404
ldr r0, [sp, #8]
ldr r1, [sp, #0xC]
add sp, sp, #0x18
ldmia sp, {r4, sp, pc}
|$LN12@FLAC__lpc_@9|
DCD 0x4693b8b5
DCD 0xb5056e17
DCD |__imp___ltd|
DCD |__imp___ged|
DCD |__imp___divd|
DCD 0x3fe62e42
DCD 0xfefa39ef
DCD |__imp___muld|
DCD |__imp___gtd|
|$M1800|
ENDP ; |FLAC__lpc_compute_expected_bits_per_residual_sample_with_error_scale|
EXPORT |FLAC__lpc_compute_best_order|
AREA |.pdata|, PDATA
|$T1818| DCD |$LN9@FLAC__lpc_@10|
DCD 0x40008604
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|FLAC__lpc_compute_best_order| PROC
; Line 407
|$LN9@FLAC__lpc_@10|
mov r12, sp
stmdb sp!, {r0 - r3}
stmdb sp!, {r4, r5, r12, lr}
sub sp, sp, #0x38
|$M1815|
; Line 414
ldr r0, [sp, #0x50]
ldr r3, [pc, #0x1E8]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r3, r1
mov r2, r0
ldr r0, [pc, #0x1E0]
ldr r1, [pc, #0x1D8]
ldr lr, [pc, #0x1D0]
ldr r4, [lr]
mov lr, pc
mov pc, r4
str r0, [sp]
str r1, [sp, #4]
; Line 416
mov r3, #0
str r3, [sp, #0x18]
; Line 417
ldr r2, [sp]
ldr r3, [sp, #4]
ldr r1, [sp, #0x48]
ldr r0, [r1]
ldr r1, [sp, #0x48]
ldr r1, [r1, #4]
bl FLAC__lpc_compute_expected_bits_per_residual_sample_with_error_scale
str r1, [sp, #0x28]
str r0, [sp, #0x24]
ldr r0, [sp, #0x50]
ldr r3, [pc, #0x180]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r3, r1
mov r2, r0
ldr r0, [sp, #0x24]
ldr r1, [sp, #0x28]
ldr lr, [pc, #0x164]
ldr r4, [lr]
mov lr, pc
mov pc, r4
str r0, [sp, #0x10]
str r1, [sp, #0x14]
; Line 419
mov r3, #1
str r3, [sp, #0x1C]
b |$LN4@FLAC__lpc_@10|
|$LN3@FLAC__lpc_@10|
ldr r3, [sp, #0x1C]
add r3, r3, #1
str r3, [sp, #0x1C]
|$LN4@FLAC__lpc_@10|
ldr r2, [sp, #0x1C]
ldr r3, [sp, #0x4C]
cmp r2, r3
bcs |$LN2@FLAC__lpc_@10|
; Line 420
ldr r2, [sp]
ldr r3, [sp, #4]
ldr lr, [sp, #0x1C]
mov r1, #8
mul r0, lr, r1
ldr r1, [sp, #0x48]
add r1, r1, r0
str r1, [sp, #0x2C]
ldr r1, [sp, #0x2C]
ldr r0, [r1]
ldr r1, [sp, #0x2C]
ldr r1, [r1, #4]
bl FLAC__lpc_compute_expected_bits_per_residual_sample_with_error_scale
str r1, [sp, #0x34]
str r0, [sp, #0x30]
ldr r2, [sp, #0x50]
ldr r3, [sp, #0x1C]
sub r0, r2, r3
ldr r3, [pc, #0xD8]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r3, r1
mov r2, r0
ldr r0, [sp, #0x30]
ldr r1, [sp, #0x34]
ldr lr, [pc, #0xBC]
ldr r4, [lr]
mov lr, pc
mov pc, r4
mov r5, r1
mov r4, r0
ldr r2, [sp, #0x1C]
ldr r3, [sp, #0x54]
mul r0, r2, r3
ldr r3, [pc, #0x94]
ldr r3, [r3]
mov lr, pc
mov pc, r3
mov r3, r1
mov r2, r0
mov r0, r4
mov r1, r5
ldr lr, [pc, #0x70]
ldr r4, [lr]
mov lr, pc
mov pc, r4
str r0, [sp, #8]
str r1, [sp, #0xC]
; Line 421
ldr r0, [sp, #8]
ldr r1, [sp, #0xC]
ldr r2, [sp, #0x10]
ldr r3, [sp, #0x14]
ldr lr, [pc, #0x44]
ldr r4, [lr]
mov lr, pc
mov pc, r4
cmp r0, #0
beq |$LN1@FLAC__lpc_@10|
; Line 422
ldr r3, [sp, #0x1C]
str r3, [sp, #0x18]
; Line 423
ldr r3, [sp, #8]
str r3, [sp, #0x10]
ldr r3, [sp, #0xC]
str r3, [sp, #0x14]
|$LN1@FLAC__lpc_@10|
; Line 425
b |$LN3@FLAC__lpc_@10|
|$LN2@FLAC__lpc_@10|
; Line 427
ldr r3, [sp, #0x18]
add r3, r3, #1
str r3, [sp, #0x20]
; Line 428
ldr r0, [sp, #0x20]
add sp, sp, #0x38
ldmia sp, {r4, r5, sp, pc}
|$LN10@FLAC__lpc_@10|
DCD |__imp___ltd|
DCD |__imp___addd|
DCD |__imp___utod|
DCD |__imp___muld|
DCD |__imp___divd|
DCD 0x3fcebfbd
DCD 0xff82c58e
|$M1816|
ENDP ; |FLAC__lpc_compute_best_order|
END