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gps/GPSResources/tcpmp 0.73/amr/Pocket PC 2003 (ARMV4)/Release/dec_if.asm

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38 KiB
NASM
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Init Projects
2019-05-01 12:32:35 +00:00
; Listing generated by Microsoft (R) Optimizing Compiler Version 14.00.50727
TTL d:\MyProject\VS2005\Tcpmp\tcpmp\amr\26204\dec_if.c
CODE32
AREA |.drectve|, DRECTVE
DCB "-defaultlib:LIBCMT "
DCB "-defaultlib:OLDNAMES "
EXPORT |nb_of_param_first| [ DATA ]
AREA |.data|, DATA
|nb_of_param_first| DCW 0x9
DCW 0xe
DCW 0xf
DCW 0xf
DCW 0xf
DCW 0x13
DCW 0x13
DCW 0x13
DCW 0x13
EXPORT |D_IF_homing_frame_test|
IMPORT |memcmp|
IMPORT |dhf|
IMPORT |nb_of_param|
AREA |.pdata|, PDATA
|$T1316| DCD |$LN11@D_IF_homin|
DCD 0x40005704
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|D_IF_homing_frame_test| PROC
; File d:\myproject\vs2005\tcpmp\tcpmp\amr\26204\dec_if.c
; Line 86
|$LN11@D_IF_homin|
mov r12, sp
stmdb sp!, {r0, r1}
stmdb sp!, {r12, lr}
sub sp, sp, #0x20
|$M1313|
; Line 88
ldrsh r3, [sp, #0x2C]
cmp r3, #8
beq |$LN2@D_IF_homin|
; Line 91
ldrsh r1, [sp, #0x2C]
mov r3, #2
mul r2, r1, r3
ldr r3, [pc, #0x128]
add r3, r3, r2
ldrsh r3, [r3]
mov r1, r3
mov r3, #2
mul r2, r1, r3
ldrsh r0, [sp, #0x2C]
mov r3, #4
mul r1, r0, r3
ldr r3, [pc, #0x100]
add r3, r3, r1
ldr r1, [r3]
ldr r0, [sp, #0x28]
bl memcmp
str r0, [sp, #4]
ldr r3, [sp, #4]
cmp r3, #0
bne |$LN5@D_IF_homin|
mov r3, #1
strh r3, [sp, #8]
b |$LN6@D_IF_homin|
|$LN5@D_IF_homin|
mov r3, #0
strh r3, [sp, #8]
|$LN6@D_IF_homin|
ldrsh r3, [sp, #8]
strh r3, [sp]
b |$LN3@D_IF_homin|
; Line 93
b |$LN1@D_IF_homin|
|$LN2@D_IF_homin|
; Line 100
mov r2, #0x26
ldr r3, [pc, #0xB4]
ldr r1, [r3, #0x20]
ldr r0, [sp, #0x28]
bl memcmp
str r0, [sp, #0xC]
mov r2, #0x16
ldr r3, [pc, #0x9C]
ldr r3, [r3, #0x20]
add r1, r3, #0x28
ldr r3, [sp, #0x28]
add r0, r3, #0x28
bl memcmp
str r0, [sp, #0x10]
mov r2, #0x16
ldr r3, [pc, #0x7C]
ldr r3, [r3, #0x20]
add r1, r3, #0x40
ldr r3, [sp, #0x28]
add r0, r3, #0x40
bl memcmp
str r0, [sp, #0x14]
mov r2, #0x16
ldr r3, [pc, #0x5C]
ldr r3, [r3, #0x20]
add r1, r3, #0x58
ldr r3, [sp, #0x28]
add r0, r3, #0x58
bl memcmp
str r0, [sp, #0x18]
ldr r2, [sp, #0xC]
ldr r3, [sp, #0x10]
orr r2, r2, r3
ldr r3, [sp, #0x14]
orr r2, r2, r3
ldr r3, [sp, #0x18]
orrs r3, r2, r3
bne |$LN7@D_IF_homin|
mov r3, #1
strh r3, [sp, #0x1C]
b |$LN8@D_IF_homin|
|$LN7@D_IF_homin|
mov r3, #0
strh r3, [sp, #0x1C]
|$LN8@D_IF_homin|
ldrsh r3, [sp, #0x1C]
strh r3, [sp]
|$LN1@D_IF_homin|
|$LN3@D_IF_homin|
; Line 103
ldrsh r0, [sp]
add sp, sp, #0x20
ldmia sp, {sp, pc}
|$LN12@D_IF_homin|
DCD |dhf|
DCD |nb_of_param|
|$M1314|
ENDP ; |D_IF_homing_frame_test|
EXPORT |D_IF_homing_frame_test_first|
AREA |.pdata|, PDATA
|$T1325| DCD |$LN7@D_IF_homin@2|
DCD 0x40002504
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|D_IF_homing_frame_test_first| PROC
; Line 107
|$LN7@D_IF_homin@2|
mov r12, sp
stmdb sp!, {r0, r1}
stmdb sp!, {r12, lr}
sub sp, sp, #0xC
|$M1322|
; Line 109
ldrsh r1, [sp, #0x18]
mov r3, #2
mul r2, r1, r3
ldr r3, [pc, #0x6C]
add r3, r3, r2
ldrsh r3, [r3]
mov r1, r3
mov r3, #2
mul r2, r1, r3
ldrsh r0, [sp, #0x18]
mov r3, #4
mul r1, r0, r3
ldr r3, [pc, #0x44]
add r3, r3, r1
ldr r1, [r3]
ldr r0, [sp, #0x14]
bl memcmp
str r0, [sp, #4]
ldr r3, [sp, #4]
cmp r3, #0
bne |$LN3@D_IF_homin@2|
mov r3, #1
strh r3, [sp, #8]
b |$LN4@D_IF_homin@2|
|$LN3@D_IF_homin@2|
mov r3, #0
strh r3, [sp, #8]
|$LN4@D_IF_homin@2|
ldrsh r3, [sp, #8]
strh r3, [sp]
; Line 110
ldrsh r0, [sp]
add sp, sp, #0xC
ldmia sp, {sp, pc}
|$LN8@D_IF_homin@2|
DCD |dhf|
DCD |nb_of_param_first|
|$M1323|
ENDP ; |D_IF_homing_frame_test_first|
EXPORT |D_IF_mms_conversion|
IMPORT |mode_24k|
IMPORT |mode_23k|
IMPORT |mode_20k|
IMPORT |mode_18k|
IMPORT |mode_16k|
IMPORT |mode_14k|
IMPORT |mode_12k|
IMPORT |mode_9k|
IMPORT |mode_7k|
IMPORT |mode_DTX|
IMPORT |memset|
IMPORT |__imp___rt_sdiv|
AREA |.pdata|, PDATA
|$T1349| DCD |$LN91@D_IF_mms_c|
DCD 0x4002fe04
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|D_IF_mms_conversion| PROC
; Line 462
|$LN91@D_IF_mms_c|
mov r12, sp
stmdb sp!, {r0 - r3}
stmdb sp!, {r12, lr}
sub sp, sp, #0x1C
|$M1346|
; Line 467
mov r2, #0x70
mov r1, #0
ldr r0, [sp, #0x24]
bl memset
; Line 469
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, asr #2
and r3, r3, #1
mov r2, r3, lsl #16
mov r2, r2, asr #16
ldr r3, [sp, #0x34]
strh r2, [r3]
; Line 470
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, asr #3
and r3, r3, #0xF
str r3, [sp]
; Line 473
ldr r3, [sp]
cmp r3, #9
bne |$LN80@D_IF_mms_c|
; Line 475
ldr r3, [sp]
add r3, r3, #1
str r3, [sp]
|$LN80@D_IF_mms_c|
; Line 478
ldr r3, [sp, #0x28]
add r3, r3, #1
str r3, [sp, #0x28]
; Line 480
ldr r3, [sp]
str r3, [sp, #0x10]
ldr r3, [sp, #0x10]
cmp r3, #0xF
bhi |$LN4@D_IF_mms_c|
ldr r2, [sp, #0x10]
mov r3, r2, lsl #2
add r3, r3, pc
ldr r3, [r3, #4]
add pc, pc, r3
|$LN88@D_IF_mms_c|
|$LN87@D_IF_mms_c|
DCD 0x1a0
DCD 0x294
DCD 0x388
DCD 0x47c
DCD 0x578
DCD 0x674
DCD 0x770
DCD 0x86c
DCD 0x968
DCD 0x3c
DCD 0xa64
DCD 0xa64
DCD 0xa64
DCD 0xa64
DCD 0x190
DCD 0x180
|$LN77@D_IF_mms_c|
; Line 483
ldr r3, [pc, #0xB0C]
str r3, [sp, #4]
; Line 485
mov r3, #1
str r3, [sp, #8]
b |$LN76@D_IF_mms_c|
|$LN75@D_IF_mms_c|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN76@D_IF_mms_c|
ldr r3, [sp, #8]
cmp r3, #0x23
bgt |$LN74@D_IF_mms_c|
; Line 487
ldr r3, [sp, #0x28]
ldrb r3, [r3]
tst r3, #0x80
beq |$LN73@D_IF_mms_c|
; Line 489
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
ldrsh r2, [r3]
ldr r3, [sp, #4]
add r3, r3, #2
ldrsh r3, [r3]
add r3, r2, r3
mov r0, r3, lsl #16
mov r0, r0, asr #16
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
strh r0, [r3]
|$LN73@D_IF_mms_c|
; Line 492
ldr r3, [sp, #4]
add r3, r3, #4
str r3, [sp, #4]
; Line 494
ldr r1, [sp, #8]
mov r0, #8
ldr r3, [pc, #0xA44]
ldr r3, [r3]
mov lr, pc
mov pc, r3
cmp r1, #0
beq |$LN72@D_IF_mms_c|
; Line 496
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, lsl #1
and r2, r3, #0xFF
ldr r3, [sp, #0x28]
strb r2, [r3]
; Line 498
b |$LN71@D_IF_mms_c|
|$LN72@D_IF_mms_c|
; Line 500
ldr r3, [sp, #0x28]
add r3, r3, #1
str r3, [sp, #0x28]
|$LN71@D_IF_mms_c|
; Line 502
b |$LN75@D_IF_mms_c|
|$LN74@D_IF_mms_c|
; Line 506
ldr r2, [sp, #0x2C]
mov r3, #4
strb r3, [r2]
; Line 508
ldr r3, [sp, #0x28]
ldrb r3, [r3]
tst r3, #0x80
beq |$LN70@D_IF_mms_c|
; Line 510
ldr r2, [sp, #0x2C]
mov r3, #5
strb r3, [r2]
|$LN70@D_IF_mms_c|
; Line 513
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, lsl #1
and r2, r3, #0xFF
ldr r3, [sp, #0x28]
strb r2, [r3]
; Line 516
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, asr #4
mov r2, r3, lsl #16
mov r2, r2, asr #16
ldr r3, [sp, #0x30]
strh r2, [r3]
; Line 517
b |$LN78@D_IF_mms_c|
|$LN69@D_IF_mms_c|
; Line 520
ldr r2, [sp, #0x2C]
mov r3, #7
strb r3, [r2]
; Line 521
b |$LN78@D_IF_mms_c|
|$LN68@D_IF_mms_c|
; Line 524
ldr r2, [sp, #0x2C]
mov r3, #2
strb r3, [r2]
; Line 525
b |$LN78@D_IF_mms_c|
|$LN67@D_IF_mms_c|
; Line 528
ldr r3, [pc, #0x9A4]
str r3, [sp, #4]
; Line 530
mov r3, #1
str r3, [sp, #8]
b |$LN66@D_IF_mms_c|
|$LN65@D_IF_mms_c|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN66@D_IF_mms_c|
ldr r3, [sp, #8]
cmp r3, #0x84
bgt |$LN64@D_IF_mms_c|
; Line 532
ldr r3, [sp, #0x28]
ldrb r3, [r3]
tst r3, #0x80
beq |$LN63@D_IF_mms_c|
; Line 534
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
ldrsh r2, [r3]
ldr r3, [sp, #4]
add r3, r3, #2
ldrsh r3, [r3]
add r3, r2, r3
mov r0, r3, lsl #16
mov r0, r0, asr #16
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
strh r0, [r3]
|$LN63@D_IF_mms_c|
; Line 536
ldr r3, [sp, #4]
add r3, r3, #4
str r3, [sp, #4]
; Line 538
ldr r1, [sp, #8]
mov r0, #8
ldr r3, [pc, #0x8E0]
ldr r3, [r3]
mov lr, pc
mov pc, r3
cmp r1, #0
beq |$LN62@D_IF_mms_c|
; Line 540
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, lsl #1
and r2, r3, #0xFF
ldr r3, [sp, #0x28]
strb r2, [r3]
; Line 542
b |$LN61@D_IF_mms_c|
|$LN62@D_IF_mms_c|
; Line 544
ldr r3, [sp, #0x28]
add r3, r3, #1
str r3, [sp, #0x28]
|$LN61@D_IF_mms_c|
; Line 546
b |$LN65@D_IF_mms_c|
|$LN64@D_IF_mms_c|
; Line 548
ldr r2, [sp, #0x2C]
mov r3, #0
strb r3, [r2]
; Line 549
b |$LN78@D_IF_mms_c|
|$LN60@D_IF_mms_c|
; Line 552
ldr r3, [pc, #0x8AC]
str r3, [sp, #4]
; Line 554
mov r3, #1
str r3, [sp, #8]
b |$LN59@D_IF_mms_c|
|$LN58@D_IF_mms_c|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN59@D_IF_mms_c|
ldr r3, [sp, #8]
cmp r3, #0xB1
bgt |$LN57@D_IF_mms_c|
; Line 556
ldr r3, [sp, #0x28]
ldrb r3, [r3]
tst r3, #0x80
beq |$LN56@D_IF_mms_c|
; Line 558
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
ldrsh r2, [r3]
ldr r3, [sp, #4]
add r3, r3, #2
ldrsh r3, [r3]
add r3, r2, r3
mov r0, r3, lsl #16
mov r0, r0, asr #16
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
strh r0, [r3]
|$LN56@D_IF_mms_c|
; Line 560
ldr r3, [sp, #4]
add r3, r3, #4
str r3, [sp, #4]
; Line 562
ldr r1, [sp, #8]
mov r0, #8
ldr r3, [pc, #0x7EC]
ldr r3, [r3]
mov lr, pc
mov pc, r3
cmp r1, #0
beq |$LN55@D_IF_mms_c|
; Line 564
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, lsl #1
and r2, r3, #0xFF
ldr r3, [sp, #0x28]
strb r2, [r3]
; Line 566
b |$LN54@D_IF_mms_c|
|$LN55@D_IF_mms_c|
; Line 568
ldr r3, [sp, #0x28]
add r3, r3, #1
str r3, [sp, #0x28]
|$LN54@D_IF_mms_c|
; Line 570
b |$LN58@D_IF_mms_c|
|$LN57@D_IF_mms_c|
; Line 572
ldr r2, [sp, #0x2C]
mov r3, #0
strb r3, [r2]
; Line 573
b |$LN78@D_IF_mms_c|
|$LN53@D_IF_mms_c|
; Line 576
ldr r3, [pc, #0x7B4]
str r3, [sp, #4]
; Line 578
mov r3, #1
str r3, [sp, #8]
b |$LN52@D_IF_mms_c|
|$LN51@D_IF_mms_c|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN52@D_IF_mms_c|
ldr r3, [sp, #8]
cmp r3, #0xFD
bgt |$LN50@D_IF_mms_c|
; Line 580
ldr r3, [sp, #0x28]
ldrb r3, [r3]
tst r3, #0x80
beq |$LN49@D_IF_mms_c|
; Line 582
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
ldrsh r2, [r3]
ldr r3, [sp, #4]
add r3, r3, #2
ldrsh r3, [r3]
add r3, r2, r3
mov r0, r3, lsl #16
mov r0, r0, asr #16
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
strh r0, [r3]
|$LN49@D_IF_mms_c|
; Line 584
ldr r3, [sp, #4]
add r3, r3, #4
str r3, [sp, #4]
; Line 586
ldr r1, [sp, #8]
mov r0, #8
ldr r3, [pc, #0x6F8]
ldr r3, [r3]
mov lr, pc
mov pc, r3
cmp r1, #0
beq |$LN48@D_IF_mms_c|
; Line 588
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, lsl #1
and r2, r3, #0xFF
ldr r3, [sp, #0x28]
strb r2, [r3]
; Line 590
b |$LN47@D_IF_mms_c|
|$LN48@D_IF_mms_c|
; Line 592
ldr r3, [sp, #0x28]
add r3, r3, #1
str r3, [sp, #0x28]
|$LN47@D_IF_mms_c|
; Line 594
b |$LN51@D_IF_mms_c|
|$LN50@D_IF_mms_c|
; Line 596
ldr r2, [sp, #0x2C]
mov r3, #0
strb r3, [r2]
; Line 597
b |$LN78@D_IF_mms_c|
|$LN46@D_IF_mms_c|
; Line 600
ldr r3, [pc, #0x6BC]
str r3, [sp, #4]
; Line 602
mov r3, #1
str r3, [sp, #8]
b |$LN45@D_IF_mms_c|
|$LN44@D_IF_mms_c|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN45@D_IF_mms_c|
ldr r2, [sp, #8]
mov r3, #1, 24
orr r3, r3, #0x1D
cmp r2, r3
bgt |$LN43@D_IF_mms_c|
; Line 604
ldr r3, [sp, #0x28]
ldrb r3, [r3]
tst r3, #0x80
beq |$LN42@D_IF_mms_c|
; Line 606
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
ldrsh r2, [r3]
ldr r3, [sp, #4]
add r3, r3, #2
ldrsh r3, [r3]
add r3, r2, r3
mov r0, r3, lsl #16
mov r0, r0, asr #16
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
strh r0, [r3]
|$LN42@D_IF_mms_c|
; Line 609
ldr r3, [sp, #4]
add r3, r3, #4
str r3, [sp, #4]
; Line 611
ldr r1, [sp, #8]
mov r0, #8
ldr r3, [pc, #0x5FC]
ldr r3, [r3]
mov lr, pc
mov pc, r3
cmp r1, #0
beq |$LN41@D_IF_mms_c|
; Line 613
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, lsl #1
and r2, r3, #0xFF
ldr r3, [sp, #0x28]
strb r2, [r3]
; Line 615
b |$LN40@D_IF_mms_c|
|$LN41@D_IF_mms_c|
; Line 617
ldr r3, [sp, #0x28]
add r3, r3, #1
str r3, [sp, #0x28]
|$LN40@D_IF_mms_c|
; Line 619
b |$LN44@D_IF_mms_c|
|$LN43@D_IF_mms_c|
; Line 621
ldr r2, [sp, #0x2C]
mov r3, #0
strb r3, [r2]
; Line 622
b |$LN78@D_IF_mms_c|
|$LN39@D_IF_mms_c|
; Line 625
ldr r3, [pc, #0x5BC]
str r3, [sp, #4]
; Line 627
mov r3, #1
str r3, [sp, #8]
b |$LN38@D_IF_mms_c|
|$LN37@D_IF_mms_c|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN38@D_IF_mms_c|
ldr r2, [sp, #8]
mov r3, #1, 24
orr r3, r3, #0x3D
cmp r2, r3
bgt |$LN36@D_IF_mms_c|
; Line 629
ldr r3, [sp, #0x28]
ldrb r3, [r3]
tst r3, #0x80
beq |$LN35@D_IF_mms_c|
; Line 631
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
ldrsh r2, [r3]
ldr r3, [sp, #4]
add r3, r3, #2
ldrsh r3, [r3]
add r3, r2, r3
mov r0, r3, lsl #16
mov r0, r0, asr #16
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
strh r0, [r3]
|$LN35@D_IF_mms_c|
; Line 634
ldr r3, [sp, #4]
add r3, r3, #4
str r3, [sp, #4]
; Line 636
ldr r1, [sp, #8]
mov r0, #8
ldr r3, [pc, #0x500]
ldr r3, [r3]
mov lr, pc
mov pc, r3
cmp r1, #0
beq |$LN34@D_IF_mms_c|
; Line 638
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, lsl #1
and r2, r3, #0xFF
ldr r3, [sp, #0x28]
strb r2, [r3]
; Line 640
b |$LN33@D_IF_mms_c|
|$LN34@D_IF_mms_c|
; Line 642
ldr r3, [sp, #0x28]
add r3, r3, #1
str r3, [sp, #0x28]
|$LN33@D_IF_mms_c|
; Line 644
b |$LN37@D_IF_mms_c|
|$LN36@D_IF_mms_c|
; Line 646
ldr r2, [sp, #0x2C]
mov r3, #0
strb r3, [r2]
; Line 647
b |$LN78@D_IF_mms_c|
|$LN32@D_IF_mms_c|
; Line 650
ldr r3, [pc, #0x4BC]
str r3, [sp, #4]
; Line 652
mov r3, #1
str r3, [sp, #8]
b |$LN31@D_IF_mms_c|
|$LN30@D_IF_mms_c|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN31@D_IF_mms_c|
ldr r2, [sp, #8]
mov r3, #1, 24
orr r3, r3, #0x6D
cmp r2, r3
bgt |$LN29@D_IF_mms_c|
; Line 654
ldr r3, [sp, #0x28]
ldrb r3, [r3]
tst r3, #0x80
beq |$LN28@D_IF_mms_c|
; Line 656
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
ldrsh r2, [r3]
ldr r3, [sp, #4]
add r3, r3, #2
ldrsh r3, [r3]
add r3, r2, r3
mov r0, r3, lsl #16
mov r0, r0, asr #16
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
strh r0, [r3]
|$LN28@D_IF_mms_c|
; Line 659
ldr r3, [sp, #4]
add r3, r3, #4
str r3, [sp, #4]
; Line 661
ldr r1, [sp, #8]
mov r0, #8
ldr r3, [pc, #0x404]
ldr r3, [r3]
mov lr, pc
mov pc, r3
cmp r1, #0
beq |$LN27@D_IF_mms_c|
; Line 663
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, lsl #1
and r2, r3, #0xFF
ldr r3, [sp, #0x28]
strb r2, [r3]
; Line 665
b |$LN26@D_IF_mms_c|
|$LN27@D_IF_mms_c|
; Line 667
ldr r3, [sp, #0x28]
add r3, r3, #1
str r3, [sp, #0x28]
|$LN26@D_IF_mms_c|
; Line 669
b |$LN30@D_IF_mms_c|
|$LN29@D_IF_mms_c|
; Line 671
ldr r2, [sp, #0x2C]
mov r3, #0
strb r3, [r2]
; Line 672
b |$LN78@D_IF_mms_c|
|$LN25@D_IF_mms_c|
; Line 675
ldr r3, [pc, #0x3BC]
str r3, [sp, #4]
; Line 677
mov r3, #1
str r3, [sp, #8]
b |$LN24@D_IF_mms_c|
|$LN23@D_IF_mms_c|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN24@D_IF_mms_c|
ldr r2, [sp, #8]
mov r3, #1, 24
orr r3, r3, #0x8D
cmp r2, r3
bgt |$LN22@D_IF_mms_c|
; Line 679
ldr r3, [sp, #0x28]
ldrb r3, [r3]
tst r3, #0x80
beq |$LN21@D_IF_mms_c|
; Line 681
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
ldrsh r2, [r3]
ldr r3, [sp, #4]
add r3, r3, #2
ldrsh r3, [r3]
add r3, r2, r3
mov r0, r3, lsl #16
mov r0, r0, asr #16
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
strh r0, [r3]
|$LN21@D_IF_mms_c|
; Line 684
ldr r3, [sp, #4]
add r3, r3, #4
str r3, [sp, #4]
; Line 686
ldr r1, [sp, #8]
mov r0, #8
ldr r3, [pc, #0x308]
ldr r3, [r3]
mov lr, pc
mov pc, r3
cmp r1, #0
beq |$LN20@D_IF_mms_c|
; Line 688
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, lsl #1
and r2, r3, #0xFF
ldr r3, [sp, #0x28]
strb r2, [r3]
; Line 690
b |$LN19@D_IF_mms_c|
|$LN20@D_IF_mms_c|
; Line 692
ldr r3, [sp, #0x28]
add r3, r3, #1
str r3, [sp, #0x28]
|$LN19@D_IF_mms_c|
; Line 694
b |$LN23@D_IF_mms_c|
|$LN22@D_IF_mms_c|
; Line 696
ldr r2, [sp, #0x2C]
mov r3, #0
strb r3, [r2]
; Line 697
b |$LN78@D_IF_mms_c|
|$LN18@D_IF_mms_c|
; Line 700
ldr r3, [pc, #0x2BC]
str r3, [sp, #4]
; Line 702
mov r3, #1
str r3, [sp, #8]
b |$LN17@D_IF_mms_c|
|$LN16@D_IF_mms_c|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN17@D_IF_mms_c|
ldr r2, [sp, #8]
mov r3, #1, 24
orr r3, r3, #0xCD
cmp r2, r3
bgt |$LN15@D_IF_mms_c|
; Line 704
ldr r3, [sp, #0x28]
ldrb r3, [r3]
tst r3, #0x80
beq |$LN14@D_IF_mms_c|
; Line 706
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
ldrsh r2, [r3]
ldr r3, [sp, #4]
add r3, r3, #2
ldrsh r3, [r3]
add r3, r2, r3
mov r0, r3, lsl #16
mov r0, r0, asr #16
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
strh r0, [r3]
|$LN14@D_IF_mms_c|
; Line 709
ldr r3, [sp, #4]
add r3, r3, #4
str r3, [sp, #4]
; Line 711
ldr r1, [sp, #8]
mov r0, #8
ldr r3, [pc, #0x20C]
ldr r3, [r3]
mov lr, pc
mov pc, r3
cmp r1, #0
beq |$LN13@D_IF_mms_c|
; Line 713
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, lsl #1
and r2, r3, #0xFF
ldr r3, [sp, #0x28]
strb r2, [r3]
; Line 715
b |$LN12@D_IF_mms_c|
|$LN13@D_IF_mms_c|
; Line 717
ldr r3, [sp, #0x28]
add r3, r3, #1
str r3, [sp, #0x28]
|$LN12@D_IF_mms_c|
; Line 720
b |$LN16@D_IF_mms_c|
|$LN15@D_IF_mms_c|
; Line 722
ldr r2, [sp, #0x2C]
mov r3, #0
strb r3, [r2]
; Line 723
b |$LN78@D_IF_mms_c|
|$LN11@D_IF_mms_c|
; Line 726
ldr r3, [pc, #0x1BC]
str r3, [sp, #4]
; Line 728
mov r3, #1
str r3, [sp, #8]
b |$LN10@D_IF_mms_c|
|$LN9@D_IF_mms_c|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN10@D_IF_mms_c|
ldr r2, [sp, #8]
mov r3, #1, 24
orr r3, r3, #0xDD
cmp r2, r3
bgt |$LN8@D_IF_mms_c|
; Line 730
ldr r3, [sp, #0x28]
ldrb r3, [r3]
tst r3, #0x80
beq |$LN7@D_IF_mms_c|
; Line 732
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
ldrsh r2, [r3]
ldr r3, [sp, #4]
add r3, r3, #2
ldrsh r3, [r3]
add r3, r2, r3
mov r0, r3, lsl #16
mov r0, r0, asr #16
ldr r3, [sp, #4]
ldrsh r1, [r3]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0x24]
add r3, r3, r2
strh r0, [r3]
|$LN7@D_IF_mms_c|
; Line 735
ldr r3, [sp, #4]
add r3, r3, #4
str r3, [sp, #4]
; Line 737
ldr r1, [sp, #8]
mov r0, #8
ldr r3, [pc, #0x110]
ldr r3, [r3]
mov lr, pc
mov pc, r3
cmp r1, #0
beq |$LN6@D_IF_mms_c|
; Line 739
ldr r3, [sp, #0x28]
ldrb r3, [r3]
mov r3, r3, lsl #1
and r2, r3, #0xFF
ldr r3, [sp, #0x28]
strb r2, [r3]
; Line 741
b |$LN5@D_IF_mms_c|
|$LN6@D_IF_mms_c|
; Line 743
ldr r3, [sp, #0x28]
add r3, r3, #1
str r3, [sp, #0x28]
|$LN5@D_IF_mms_c|
; Line 746
b |$LN9@D_IF_mms_c|
|$LN8@D_IF_mms_c|
; Line 748
ldr r2, [sp, #0x2C]
mov r3, #0
strb r3, [r2]
; Line 749
b |$LN78@D_IF_mms_c|
|$LN4@D_IF_mms_c|
; Line 752
ldr r2, [sp, #0x2C]
mov r3, #2
strb r3, [r2]
; Line 753
ldr r2, [sp, #0x34]
mov r3, #0
strh r3, [r2]
|$LN78@D_IF_mms_c|
; Line 758
ldr r3, [sp, #0x34]
ldrsh r3, [r3]
cmp r3, #0
bne |$LN3@D_IF_mms_c|
; Line 760
ldr r3, [sp, #0x2C]
ldrb r3, [r3]
cmp r3, #0
bne |$LN2@D_IF_mms_c|
; Line 762
ldr r2, [sp, #0x2C]
mov r3, #3
strb r3, [r2]
|$LN2@D_IF_mms_c|
; Line 764
ldr r3, [sp, #0x2C]
ldrb r3, [r3]
cmp r3, #4
bne |$LN85@D_IF_mms_c|
mov r3, #1
str r3, [sp, #0x14]
b |$LN86@D_IF_mms_c|
|$LN85@D_IF_mms_c|
mov r3, #0
str r3, [sp, #0x14]
|$LN86@D_IF_mms_c|
ldr r3, [sp, #0x2C]
ldrb r3, [r3]
cmp r3, #5
bne |$LN83@D_IF_mms_c|
mov r3, #1
str r3, [sp, #0x18]
b |$LN84@D_IF_mms_c|
|$LN83@D_IF_mms_c|
mov r3, #0
str r3, [sp, #0x18]
|$LN84@D_IF_mms_c|
ldr r2, [sp, #0x14]
ldr r3, [sp, #0x18]
orrs r3, r2, r3
beq |$LN1@D_IF_mms_c|
; Line 766
ldr r2, [sp, #0x2C]
mov r3, #6
strb r3, [r2]
|$LN1@D_IF_mms_c|
|$LN3@D_IF_mms_c|
; Line 770
ldr r3, [sp]
mov r3, r3, lsl #16
mov r3, r3, asr #16
strh r3, [sp, #0xC]
; Line 771
ldrsh r0, [sp, #0xC]
add sp, sp, #0x1C
ldmia sp, {sp, pc}
|$LN92@D_IF_mms_c|
DCD |__imp___rt_sdiv|
DCD |mode_24k|
DCD |mode_23k|
DCD |mode_20k|
DCD |mode_18k|
DCD |mode_16k|
DCD |mode_14k|
DCD |mode_12k|
DCD |mode_9k|
DCD |mode_7k|
DCD |mode_DTX|
|$M1347|
ENDP ; |D_IF_mms_conversion|
EXPORT |D_IF_decode|
IMPORT |D_MAIN_reset|
IMPORT |D_MAIN_decode|
AREA |.pdata|, PDATA
|$T1369| DCD |$LN34@D_IF_decod|
DCD 0x4000d104
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|D_IF_decode| PROC
; Line 797
|$LN34@D_IF_decod|
mov r12, sp
stmdb sp!, {r0 - r3}
stmdb sp!, {r12, lr}
sub sp, sp, #0xB4
|$M1366|
; Line 799
mov r3, #0
strh r3, [sp, #6]
; Line 800
mov r3, #0
strh r3, [sp, #0x84]
; Line 806
mov r3, #0
strh r3, [sp, #4]
; Line 809
ldr r3, [sp, #0xBC]
str r3, [sp, #0xC]
; Line 812
ldr r3, [sp, #0xC8]
cmp r3, #0
bne |$LN22@D_IF_decod|
mov r3, #1
str r3, [sp, #0x90]
b |$LN23@D_IF_decod|
|$LN22@D_IF_decod|
mov r3, #0
str r3, [sp, #0x90]
|$LN23@D_IF_decod|
ldr r3, [sp, #0xC8]
cmp r3, #1
bne |$LN20@D_IF_decod|
mov r3, #1
str r3, [sp, #0x94]
b |$LN21@D_IF_decod|
|$LN20@D_IF_decod|
mov r3, #0
str r3, [sp, #0x94]
|$LN21@D_IF_decod|
ldr r2, [sp, #0x90]
ldr r3, [sp, #0x94]
orrs r3, r2, r3
beq |$LN17@D_IF_decod|
; Line 818
ldr r3, [sp, #0xC0]
ldrb r3, [r3]
mov r2, r3
ldr r3, [sp, #0xC8]
mov r3, r3, lsl #2
mvn r3, r3
and r3, r2, r3
and r2, r3, #0xFF
ldr r3, [sp, #0xC0]
strb r2, [r3]
; Line 827
add r3, sp, #0x12
str r3, [sp]
add r3, sp, #0x84
add r2, sp, #0x10
ldr r1, [sp, #0xC0]
add r0, sp, #0x14
bl D_IF_mms_conversion
strh r0, [sp, #0x98]
ldrsh r3, [sp, #0x98]
strh r3, [sp, #6]
b |$LN16@D_IF_decod|
|$LN17@D_IF_decod|
; Line 831
ldr r3, [sp, #0xC8]
cmp r3, #3
bne |$LN15@D_IF_decod|
; Line 833
mov r3, #7
strb r3, [sp, #0x10]
; Line 835
b |$LN14@D_IF_decod|
|$LN15@D_IF_decod|
; Line 837
mov r3, #2
strb r3, [sp, #0x10]
|$LN14@D_IF_decod|
|$LN16@D_IF_decod|
; Line 844
ldrb r3, [sp, #0x10]
cmp r3, #2
bne |$LN26@D_IF_decod|
mov r3, #1
str r3, [sp, #0x9C]
b |$LN27@D_IF_decod|
|$LN26@D_IF_decod|
mov r3, #0
str r3, [sp, #0x9C]
|$LN27@D_IF_decod|
ldrb r3, [sp, #0x10]
cmp r3, #7
bne |$LN24@D_IF_decod|
mov r3, #1
str r3, [sp, #0xA0]
b |$LN25@D_IF_decod|
|$LN24@D_IF_decod|
mov r3, #0
str r3, [sp, #0xA0]
|$LN25@D_IF_decod|
ldr r2, [sp, #0x9C]
ldr r3, [sp, #0xA0]
orrs r3, r2, r3
beq |$LN13@D_IF_decod|
; Line 846
ldr r3, [sp, #0xC]
add r3, r3, #4
ldrsh r3, [r3]
strh r3, [sp, #6]
|$LN13@D_IF_decod|
; Line 849
ldrsh r3, [sp, #6]
cmp r3, #9
bne |$LN12@D_IF_decod|
; Line 851
ldrsh r3, [sp, #0x84]
strh r3, [sp, #6]
|$LN12@D_IF_decod|
; Line 855
ldr r3, [sp, #0xC]
ldrsh r3, [r3]
cmp r3, #1
bne |$LN11@D_IF_decod|
; Line 858
ldrsh r1, [sp, #6]
add r0, sp, #0x14
bl D_IF_homing_frame_test_first
strh r0, [sp, #0xA4]
ldrsh r3, [sp, #0xA4]
strh r3, [sp, #4]
|$LN11@D_IF_decod|
; Line 862
ldrsh r3, [sp, #4]
cmp r3, #0
beq |$LN10@D_IF_decod|
ldr r3, [sp, #0xC]
ldrsh r3, [r3]
cmp r3, #0
beq |$LN10@D_IF_decod|
; Line 864
mov r3, #0
str r3, [sp, #8]
b |$LN9@D_IF_decod|
|$LN8@D_IF_decod|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN9@D_IF_decod|
ldr r3, [sp, #8]
cmp r3, #5, 26
bge |$LN7@D_IF_decod|
; Line 866
ldr r1, [sp, #8]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0xC4]
add r2, r3, r2
mov r3, #8
strh r3, [r2]
; Line 867
b |$LN8@D_IF_decod|
|$LN7@D_IF_decod|
; Line 869
b |$LN6@D_IF_decod|
|$LN10@D_IF_decod|
; Line 871
ldrb r3, [sp, #0x10]
str r3, [sp]
ldr r3, [sp, #0xC]
add r3, r3, #8
ldr r3, [r3]
ldr r2, [sp, #0xC4]
add r1, sp, #0x14
ldrsh r0, [sp, #6]
bl D_MAIN_decode
|$LN6@D_IF_decod|
; Line 874
mov r3, #0
str r3, [sp, #8]
b |$LN5@D_IF_decod|
|$LN4@D_IF_decod|
ldr r3, [sp, #8]
add r3, r3, #1
str r3, [sp, #8]
|$LN5@D_IF_decod|
ldr r3, [sp, #8]
cmp r3, #5, 26
bge |$LN3@D_IF_decod|
; Line 876
ldr r1, [sp, #8]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0xC4]
add r3, r3, r2
ldrsh r2, [r3]
mov r3, #0xFF, 24
orr r3, r3, #0xFC
and r3, r2, r3
mov r0, r3, lsl #16
mov r0, r0, asr #16
ldr r1, [sp, #8]
mov r3, #2
mul r2, r1, r3
ldr r3, [sp, #0xC4]
add r3, r3, r2
strh r0, [r3]
; Line 877
b |$LN4@D_IF_decod|
|$LN3@D_IF_decod|
; Line 880
ldr r3, [sp, #0xC]
ldrsh r3, [r3]
cmp r3, #0
bne |$LN30@D_IF_decod|
mov r3, #1
str r3, [sp, #0xA8]
b |$LN31@D_IF_decod|
|$LN30@D_IF_decod|
mov r3, #0
str r3, [sp, #0xA8]
|$LN31@D_IF_decod|
ldrsh r3, [sp, #6]
cmp r3, #9
bge |$LN28@D_IF_decod|
mov r3, #1
str r3, [sp, #0xAC]
b |$LN29@D_IF_decod|
|$LN28@D_IF_decod|
mov r3, #0
str r3, [sp, #0xAC]
|$LN29@D_IF_decod|
ldr r2, [sp, #0xA8]
ldr r3, [sp, #0xAC]
tst r2, r3
beq |$LN2@D_IF_decod|
; Line 883
ldrsh r1, [sp, #6]
add r0, sp, #0x14
bl D_IF_homing_frame_test
strh r0, [sp, #0xB0]
ldrsh r3, [sp, #0xB0]
strh r3, [sp, #4]
|$LN2@D_IF_decod|
; Line 886
ldrsh r3, [sp, #4]
cmp r3, #0
beq |$LN1@D_IF_decod|
; Line 888
mov r1, #1
ldr r3, [sp, #0xC]
add r3, r3, #8
ldr r0, [r3]
bl D_MAIN_reset
|$LN1@D_IF_decod|
; Line 890
ldrsh r2, [sp, #4]
ldr r3, [sp, #0xC]
strh r2, [r3]
; Line 892
ldr r3, [sp, #0xC]
add r2, r3, #2
ldrb r3, [sp, #0x10]
strh r3, [r2]
; Line 893
ldr r3, [sp, #0xC]
add r2, r3, #4
ldrsh r3, [sp, #6]
strh r3, [r2]
; Line 894
add sp, sp, #0xB4
ldmia sp, {sp, pc}
|$M1367|
ENDP ; |D_IF_decode|
EXPORT |D_IF_reset|
AREA |.pdata|, PDATA
|$T1374| DCD |$LN5@D_IF_reset|
DCD 0x40000f03
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|D_IF_reset| PROC
; Line 909
|$LN5@D_IF_reset|
mov r12, sp
stmdb sp!, {r0}
stmdb sp!, {r12, lr}
|$M1371|
; Line 910
ldr r2, [sp, #8]
mov r3, #1
strh r3, [r2]
; Line 911
ldr r3, [sp, #8]
add r2, r3, #2
mov r3, #0
strh r3, [r2]
; Line 912
ldr r3, [sp, #8]
add r2, r3, #4
mov r3, #0
strh r3, [r2]
; Line 913
ldmia sp, {sp, pc}
|$M1372|
ENDP ; |D_IF_reset|
EXPORT |D_IF_init|
IMPORT |free|
IMPORT |D_MAIN_init|
IMPORT |malloc|
AREA |.pdata|, PDATA
|$T1380| DCD |$LN7@D_IF_init|
DCD 0x40002302
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|D_IF_init| PROC
; Line 927
|$LN7@D_IF_init|
str lr, [sp, #-4]!
sub sp, sp, #0xC
|$M1377|
; Line 928
mov r3, #0
str r3, [sp]
; Line 931
mov r0, #0xC
bl malloc
str r0, [sp, #8]
ldr r3, [sp, #8]
str r3, [sp]
ldr r3, [sp]
cmp r3, #0
bne |$LN2@D_IF_init|
; Line 933
mov r3, #0
str r3, [sp, #4]
b |$LN3@D_IF_init|
|$LN2@D_IF_init|
; Line 936
ldr r3, [sp]
add r0, r3, #8
bl D_MAIN_init
; Line 937
ldr r3, [sp]
add r3, r3, #8
ldr r3, [r3]
cmp r3, #0
bne |$LN1@D_IF_init|
; Line 939
ldr r0, [sp]
bl free
; Line 940
mov r3, #0
str r3, [sp, #4]
b |$LN3@D_IF_init|
|$LN1@D_IF_init|
; Line 943
ldr r0, [sp]
bl D_IF_reset
; Line 945
ldr r3, [sp]
str r3, [sp, #4]
|$LN3@D_IF_init|
; Line 946
ldr r0, [sp, #4]
add sp, sp, #0xC
ldr pc, [sp], #4
|$M1378|
ENDP ; |D_IF_init|
EXPORT |D_IF_exit|
IMPORT |D_MAIN_close|
AREA |.pdata|, PDATA
|$T1385| DCD |$LN5@D_IF_exit|
DCD 0x40000f04
; Function compile flags: /Odsp
AREA |.text|, CODE, ARM
|D_IF_exit| PROC
; Line 961
|$LN5@D_IF_exit|
mov r12, sp
stmdb sp!, {r0}
stmdb sp!, {r12, lr}
sub sp, sp, #4
|$M1382|
; Line 964
ldr r3, [sp, #0xC]
str r3, [sp]
; Line 967
ldr r3, [sp]
add r0, r3, #8
bl D_MAIN_close
; Line 968
ldr r0, [sp]
bl free
; Line 969
mov r3, #0
str r3, [sp, #0xC]
; Line 970
add sp, sp, #4
ldmia sp, {sp, pc}
|$M1383|
ENDP ; |D_IF_exit|
END